soc/intel: Move pch_misc_init() to common code

List of changes:
1. Move pch_misc_init() into common block code.
2. Remove redundant LPC functions from SoC directory and
refer from block/lpc directory.
3. Create macros for IO port 0x61 and 0x70 as applicable.

TEST=Able to build and boot hatch and tglrvp platform without seeing
any functional impact.

Change-Id: Ie36ee63869c076d251ccfa5409001d18f22600d7
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

1 files changed, 0 insertions, 12 deletions

diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c
index e220678cb1..b21c117df0 100644
--- a/src/soc/intel/cannonlake/lpc.c
+++ b/src/soc/intel/cannonlake/lpc.c
@@ -90,18 +90,6 @@ static void soc_mirror_dmi_pcr_io_dec(void)
 	soc_setup_dmi_pcr_io_dec(&io_dec_arr[0]);
 }
 
-static void pch_misc_init(void)
-{
-	uint8_t reg8;
-
-	/* Setup NMI on errors, disable SERR */
-	reg8 = (inb(0x61)) & 0xf0;
-	outb((reg8 | (1 << 2)), 0x61);
-
-	/* Disable NMI sources */
-	outb((1 << 7), 0x70);
-};
-
 void lpc_soc_init(struct device *dev)
 {
 	const config_t *config = dev->chip_info;