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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-06-28 10:08:51 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-07-04 06:53:12 +0000
commit6e2d0c1b90251b4b61af582d2598cdbd38591db7 (patch)
tree05dd94e809ddb67fbb5b1c6f1d1c6a2ad5736a68 /src/soc/intel/cannonlake
parent8f23b5d4343c5c8ec1f7f7d453f9d8784fc0d5a2 (diff)
arch/x86: Adjust size of postcar stack
With VBOOT=y && VBOOT_MEASURED_BOOT=y message digest will be allocated from the stack and 1 KiB reserve used with the recent platforms was no longer sufficient. The comment of LZMA scratchpad consuming stack was obsolete for postcar, so these can be reduced to same 4 KiB. Change-Id: Iba1fb5bfad6946f316feac2d8c998a782142a56a Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33775 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/romstage/romstage.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 9dadb2d14e..94b9899422 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cbmem.h>
#include <console/console.h>
@@ -146,7 +147,7 @@ asmlinkage void car_stage_entry(void)
pmc_set_disb();
if (!s3wake)
save_dimm_info();
- if (postcar_frame_init(&pcf, 1 * KiB))
+ if (postcar_frame_init(&pcf, 0))
die("Unable to initialize postcar frame.\n");
/*