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authorMartin Roth <martinroth@google.com>2017-07-22 21:39:48 -0600
committerMartin Roth <martinroth@google.com>2017-07-24 15:08:08 +0000
commit467a87abcea13a1b0b61223a175cf46b16474965 (patch)
tree74b9d0a1943f3db3b10881ed8342123c353ccd8b /src/soc/intel/cannonlake
parentfa1d383f93b8bb8b7c67fe19b961e6b6a57fe503 (diff)
Fix files with multiple newlines at the end.
Change-Id: Iaab26033e947cb9cf299faf1ce6d40a90a9facbe Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20704 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/bootblock/cpu.c1
-rw-r--r--src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h1
-rw-r--r--src/soc/intel/cannonlake/romstage/power_state.c1
3 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/cpu.c b/src/soc/intel/cannonlake/bootblock/cpu.c
index 5b336da497..3ebe1e48e6 100644
--- a/src/soc/intel/cannonlake/bootblock/cpu.c
+++ b/src/soc/intel/cannonlake/bootblock/cpu.c
@@ -25,4 +25,3 @@ void bootblock_cpu_init(void)
IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
fast_spi_cache_bios_region();
}
-
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
index cdc40d4216..e9a5b89491 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
@@ -249,4 +249,3 @@
#define NUM_GPIO_COM2_PADS (GPD11 - GPD0 + 1)
#endif
-
diff --git a/src/soc/intel/cannonlake/romstage/power_state.c b/src/soc/intel/cannonlake/romstage/power_state.c
index 2c98a9e5ac..2c45ad9354 100644
--- a/src/soc/intel/cannonlake/romstage/power_state.c
+++ b/src/soc/intel/cannonlake/romstage/power_state.c
@@ -29,4 +29,3 @@ struct chipset_power_state *fill_power_state(void)
return ps;
}
-