soc/intel/cannonlake: Init UPD params based on config

Initialize UPD params based upon config

Change-Id: Ib2ee58f8432a957ef389b40f717533e4cfe774b9
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/21175
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 52 insertions, 0 deletions

diff --git a/src/soc/intel/cannonlake/vr_config.c b/src/soc/intel/cannonlake/vr_config.c
new file mode 100644
index 0000000000..fff68c7e18
--- /dev/null
+++ b/src/soc/intel/cannonlake/vr_config.c
@@ -0,0 +1,52 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <fsp/api.h>
+#include <soc/ramstage.h>
+#include <soc/vr_config.h>
+
+static const struct vr_config default_configs[NUM_VR_DOMAINS] = {
+	/* TODO: define this*/
+};
+
+void fill_vr_domain_config(void *params,
+		int domain, const struct vr_config *chip_cfg)
+{
+	FSP_S_CONFIG *vr_params = (FSP_S_CONFIG *)params;
+	const struct vr_config *cfg;
+
+	if (domain < 0 || domain >= NUM_VR_DOMAINS)
+		return;
+
+	/* Use device tree override if requested. */
+	if (chip_cfg->vr_config_enable)
+		cfg = chip_cfg;
+	else
+		cfg = &default_configs[domain];
+
+	vr_params->VrConfigEnable[domain] = cfg->vr_config_enable;
+	vr_params->Psi1Threshold[domain] = cfg->psi1threshold;
+	vr_params->Psi2Threshold[domain] = cfg->psi2threshold;
+	vr_params->Psi3Threshold[domain] = cfg->psi3threshold;
+	vr_params->Psi3Enable[domain] = cfg->psi3enable;
+	vr_params->Psi4Enable[domain] = cfg->psi4enable;
+	vr_params->ImonSlope[domain] = cfg->imon_slope;
+	vr_params->ImonOffset[domain] = cfg->imon_offset;
+	vr_params->IccMax[domain] = cfg->icc_max;
+	vr_params->VrVoltageLimit[domain] = cfg->voltage_limit;
+	vr_params->AcLoadline[domain] = cfg->ac_loadline;
+	vr_params->DcLoadline[domain] = cfg->dc_loadline;
+}