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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-07-13 09:44:43 +0300
committerMartin Roth <martinroth@google.com>2019-07-21 18:56:11 +0000
commite1559eb84f26ab2476512bf999282ccf94c7176c (patch)
treec1399187af52e69a9e3b47763a4f23a4a7d792d9 /src/soc/intel/cannonlake/uart.c
parent3a82e9b8a32b80edc5f21bb7f4dae4dcb1d047b2 (diff)
soc/intel: Fix chip_info for PCH_DEV_PMC
Since PCH_DEVFN_PMC device is a PCI device that may be hidden from enumeration, use SA_DEVFN_ROOT instead to locate the SOC configuration. Change-Id: I4b5195827fb32ec1dbd0bd6c9e243f4f9a4775ca Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34327 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/uart.c')
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