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authorDuncan Laurie <dlaurie@google.com>2018-11-08 15:46:16 -0700
committerDuncan Laurie <dlaurie@chromium.org>2018-11-13 16:32:27 +0000
commit98456f4ee6e1d7df2863e2fafe8e505522a48da8 (patch)
tree3631482088033a55286946fa7cbbb17d4479b50f /src/soc/intel/cannonlake/uart.c
parent6efa5c38460b28d650231429ae4fc9a0be7fddba (diff)
mb/cannonlake: Remove SmbusEnable from devicetree
Remove the SmbusEnable parameter from all Cannon Lake mainboards. Instead this will be determined by the enable state of the SMBUS PCI device. Change-Id: I7ece6768da4c517747af12a07012583575816ae1 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/29551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/uart.c')
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