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authorSubrata Banik <subrata.banik@intel.com>2017-08-17 14:34:17 +0530
committerMartin Roth <martinroth@google.com>2017-08-21 16:30:24 +0000
commit226065834b046bdeba43b71e63ec896c9adfeb0b (patch)
treea37d6965de94d3ffe9f5a09e60c8040bfc29dee4 /src/soc/intel/cannonlake/uart.c
parent7e9cb9281581fdf1b75ef5e6f32a1ec322e11c8f (diff)
soc/intel/cannonlake: Add support for all UART port index
Select LPSS UART Base address based on LPSS UART port index. Change-Id: I31b239e7e6b7e9ac8ea2fcfbcbd8cb148ef9e586 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/20999 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/uart.c')
-rw-r--r--src/soc/intel/cannonlake/uart.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/uart.c b/src/soc/intel/cannonlake/uart.c
index af224eb9ce..66883ec7e3 100644
--- a/src/soc/intel/cannonlake/uart.c
+++ b/src/soc/intel/cannonlake/uart.c
@@ -79,6 +79,6 @@ void pch_uart_init(void)
uintptr_t uart_platform_base(int idx)
{
/* We can only have one serial console at a time */
- return UART_DEBUG_BASE_ADDRESS;
+ return UART_BASE_0_ADDR(idx);
}
#endif