summaryrefslogtreecommitdiff
path: root/src/soc/intel/cannonlake/spi.c
diff options
context:
space:
mode:
authorDuncan Laurie <dlaurie@google.com>2018-11-20 17:33:12 -0800
committerDuncan Laurie <dlaurie@chromium.org>2018-12-04 22:49:25 +0000
commit833a3a879d9af4c793233dd537f5fa9da5b3c110 (patch)
treecf0108417fc0915386debca95cc63dfdfb894917 /src/soc/intel/cannonlake/spi.c
parentbfb001d1a0b953fd832fce6bb13c02657ab1139f (diff)
mb/google/sarien: Enable DPTF
Enable DPTF support for sarien/arcada boards. This is currently using placeholder values that are identical that will be updated after thermal tuning is done. Change-Id: I7d51c3b38068fc25927c8dafc0bd9069b29d77f5 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/29762 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/spi.c')
0 files changed, 0 insertions, 0 deletions