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authorSubrata Banik <subrata.banik@intel.com>2017-12-14 18:22:13 +0530
committerSubrata Banik <subrata.banik@intel.com>2017-12-22 01:41:30 +0000
commit47a655cde3bd667beede719e8f5163381810c1e8 (patch)
treea7c31e7b23fd86c5d826d1205d33f614684bb838 /src/soc/intel/cannonlake/smihandler.c
parent9c3a7b6a17bfc00086a32691a486355093eed651 (diff)
soc/intel/common: Add missing SoC common function into SMM library
Modify SMM common code in order to accommodate SKL, CNL, APL, GLK SOC code. Change-Id: Ie9f90df3336c1278b73284815b5197400512c1d2 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22869 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/smihandler.c')
-rw-r--r--src/soc/intel/cannonlake/smihandler.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/smihandler.c b/src/soc/intel/cannonlake/smihandler.c
index 0653e9f3a2..8c55ce7892 100644
--- a/src/soc/intel/cannonlake/smihandler.c
+++ b/src/soc/intel/cannonlake/smihandler.c
@@ -23,6 +23,16 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void)
return &em64t101_smm_ops;
}
+/* SMI handlers that should be serviced in SCI mode too. */
+uint32_t smi_handler_get_sci_mask(void)
+{
+ uint32_t sci_mask =
+ SMI_HANDLER_SCI_EN(APM_STS_BIT) |
+ SMI_HANDLER_SCI_EN(SMI_ON_SLP_EN_STS_BIT);
+
+ return sci_mask;
+}
+
const smi_handler_t southbridge_smi[SMI_STS_BITS] = {
[SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep,
[APM_STS_BIT] = smihandler_southbridge_apmc,