diff options
| author | Martin Roth <martin@coreboot.org> | 2020-07-24 12:26:21 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-26 21:21:03 +0000 |
| commit | c25c1ebd9ed54d9c70d4c247c71fc19259751413 (patch) | |
| tree | d68c85a2ea48572c40b42c223cfbbcd922012fcb /src/soc/intel/cannonlake/romstage | |
| parent | f48acbda7be7074938c06db8ad37705f850661ee (diff) | |
src: Update bare access to BOOL CONFIG_ vals to CONFIG()
BOOL type Kconfig values should be used through the CONFIG() macro.
These instances were not, so update them.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ie4706d82c12c487607bbf5ad8059922e0e586858
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/cannonlake/romstage')
| -rw-r--r-- | src/soc/intel/cannonlake/romstage/fsp_params.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index c1afd1e003..37f4d50b0b 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -74,7 +74,7 @@ static void soc_memory_init_params(FSPM_UPD *mupd, const config_t *config) m_cfg->VmxEnable = CONFIG(ENABLE_VMX); #if CONFIG(SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS) - m_cfg->SkipMpInit = !CONFIG_USE_INTEL_FSP_MP_INIT; + m_cfg->SkipMpInit = !CONFIG(USE_INTEL_FSP_MP_INIT); #endif if (config->cpu_ratio_override) { |