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authorLijian Zhao <lijian.zhao@intel.com>2018-03-12 18:05:53 -0700
committerMartin Roth <martinroth@google.com>2018-04-05 16:00:27 +0000
commit91c8e23e013204d415582b6ff2444ba5e3021306 (patch)
tree049e4d68daceda0fc98a50d422f8a0fa40702efe /src/soc/intel/cannonlake/romstage
parent32c3069fd7d076a41ceb5a0453bd9ec1ec9f8559 (diff)
soc/intel/cannonlake: Add VT-d and VMX programming
Add FSP option to enable/disable VT-d (Intel Virtualization Technology for Directed I/O) and VMX (Virtual Machine Extensions), VMX will be disabled once VT-d got disabled. Bug=b:73655383 TEST=Build and flash image on meowth board with debug build FSP, in serial log search for "VMXEnable" and "VtdDiable". Change-Id: I589590450aa4b9302ee2f9bb7b879a332f50b73e Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/25118 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/romstage')
-rw-r--r--src/soc/intel/cannonlake/romstage/romstage.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 759c2c9b43..dc9652689a 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -169,6 +169,11 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config)
/* Disable Cpu Ratio Override temporary. */
m_cfg->CpuRatio = 0;
m_cfg->PcdSerialIoUartNumber = CONFIG_UART_FOR_CONSOLE;
+ /* Disable Vmx if Vt-d is already disabled */
+ if (config->VtdDisable)
+ m_cfg->VmxEnable = 0;
+ else
+ m_cfg->VmxEnable = config->VmxEnable;
}
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)