aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/cannonlake/romstage
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2018-04-21 14:45:32 -0600
committerAaron Durbin <adurbin@chromium.org>2018-04-24 14:37:59 +0000
commit6403167d290da235a732bd2d6157aa2124fb403a (patch)
tree9c4805af37a31830934f91098d299e967df930c6 /src/soc/intel/cannonlake/romstage
parent38fd6685e9da61daadc96a8d537e6966dfe3b219 (diff)
compiler.h: add __weak macro
Instead of writing out '__attribute__((weak))' use a shorter form. Change-Id: If418a1d55052780077febd2d8f2089021f414b91 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25767 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/romstage')
-rw-r--r--src/soc/intel/cannonlake/romstage/romstage.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index c8cb927078..0459095261 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -19,6 +19,7 @@
#include <chip.h>
#include <cpu/x86/mtrr.h>
#include <cbmem.h>
+#include <compiler.h>
#include <console/console.h>
#include <fsp/util.h>
#include <intelblocks/cse.h>
@@ -194,7 +195,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
mainboard_memory_init_params(mupd);
}
-__attribute__((weak)) void mainboard_memory_init_params(FSPM_UPD *mupd)
+__weak void mainboard_memory_init_params(FSPM_UPD *mupd)
{
/* Do nothing */
}