diff options
author | Lijian Zhao <lijian.zhao@intel.com> | 2017-08-16 22:18:52 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-08-21 20:37:57 +0000 |
commit | b3dfcb863cdc62cd2cb65e97e0043311b151c558 (patch) | |
tree | 1fbd8b130d79599f82212e719781d52f6b5e32c2 /src/soc/intel/cannonlake/romstage/romstage.c | |
parent | 7a357eb8657fd891aad33fd710d2f9d4d80c9130 (diff) |
soc/intel/cannonlake: Enable common PMC code for CNL
This update changes Cannonlake to use the new common PMC code. This
will help to reduce code duplication and streamline code bring up.
Change-Id: Ia69fee8985e1c39b0e4b104c51439bca1a5493ac
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/romstage/romstage.c')
-rw-r--r-- | src/soc/intel/cannonlake/romstage/romstage.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 2f8617e4cf..ab0e19bdc6 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -14,30 +14,33 @@ */ #include <arch/io.h> +#include <arch/early_variables.h> #include <cpu/x86/mtrr.h> #include <cbmem.h> #include <console/console.h> #include <fsp/util.h> +#include <intelblocks/pmclib.h> #include <memory_info.h> #include <soc/pm.h> #include <soc/romstage.h> #include <timestamp.h> +static struct chipset_power_state power_state CAR_GLOBAL; + asmlinkage void car_stage_entry(void) { bool s3wake; struct postcar_frame pcf; uintptr_t top_of_ram; - struct chipset_power_state *ps; + struct chipset_power_state *ps = car_get_var_ptr(&power_state); console_init(); /* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ systemagent_early_init(); - ps = fill_power_state(); timestamp_add_now(TS_START_ROMSTAGE); - s3wake = ps->prev_sleep_state == ACPI_S3; + s3wake = pmc_fill_power_state(ps) == ACPI_S3; fsp_memory_init(s3wake); if (postcar_frame_init(&pcf, 1 * KiB)) die("Unable to initialize postcar frame.\n"); |