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author | Lijian Zhao <lijian.zhao@intel.com> | 2019-01-23 13:23:01 -0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-25 11:21:39 +0000 |
commit | 38e40414d250abfdc7213e6dfa11beb8d7082489 (patch) | |
tree | b5c7e016eb3ad56ed5ed9765585486c3701af5ca /src/soc/intel/cannonlake/romstage/fsp_params.c | |
parent | 57aa8b6a2b5d3272e1ea1a0ed69ca2e0ef346291 (diff) |
mb/google/sarien: Increse BIOS region size to 28MB
Increase BIOS region(SI_BIOS) from 16MB to 28MB to make more spaces for
upcoming payloads.
BUG=b:121169122
TEST=Build and boot up fine into OS on sarien and arcada platform.
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Change-Id: I4b03e20a485cb819b468c00e68f1539e92731237
Reviewed-on: https://review.coreboot.org/c/31054
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/romstage/fsp_params.c')
0 files changed, 0 insertions, 0 deletions