diff options
| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2019-05-28 13:49:44 +0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2019-05-28 20:13:42 +0000 |
| commit | 48b2adae1c3ba0c23630f912fd7f7c87f0a7528c (patch) | |
| tree | b81dff03526097ae379553152e63f88d7295af5a /src/soc/intel/cannonlake/me.c | |
| parent | 63cba976b19fb5bc3b52f8448240bece9bafb28e (diff) | |
mb/google/sarien: Modify SSD power sequence
Due to we turn off SSD power in S5. CB:32952
Based on M2 spec we have to turn on SSD power
before RST assert.
BUG=b:133389422
TEST=verify warm boot and cold boot are boot
successfully.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I5b78bab4be675bbb8795361bcfa5af52cb54bb1e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33029
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/me.c')
0 files changed, 0 insertions, 0 deletions