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author | Lubomir Rintel <lkundrak@v3.sk> | 2017-10-31 09:25:18 +0100 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2018-01-15 00:42:26 +0000 |
commit | 4d1bbe99086472185a7d4df30ee3324989e17f85 (patch) | |
tree | 1b55c26efecd69d079329c89d5df7da7c04d540f /src/soc/intel/cannonlake/lockdown.c | |
parent | 2f6a29e2e6fac16e167723b47cc0fd500770ac62 (diff) |
util/superiotool: distinguish between VT82C686 and VT1211
They both have a device id of 0x3c. The former is part of the PCI chip set
accessible via port 0x3f0 while the latter is a standalone LPC chip accessible
via 0x2e/0x4e depending on strapping.
They're not register compatible: the VT82C686 only provides a FDC, LPT and part
of UARTs.
The VT82C686 documentation suggests it has revision 0x00 while the VT1211
datasheet indicates 0x01. Nevertheless, the VT1211 I happen to have hs a
revision of 0x02. Thus the revision is probably not good enough to tell one
from the another.
Change-Id: Ic7529c84724c8d6b9eb75b863f1bceef5e4b52b5
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/22254
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/lockdown.c')
0 files changed, 0 insertions, 0 deletions