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authorBora Guvendik <bora.guvendik@intel.com>2017-09-25 14:33:17 -0700
committerAaron Durbin <adurbin@chromium.org>2017-10-03 20:24:35 +0000
commit5d11cc9d7e0ee016d6b6c540d010b212291d61cd (patch)
tree14c4b55ae277934b61d580c71f9917695ad4fdf0 /src/soc/intel/cannonlake/include
parent747f05675ecf2d0fa4635c3b25e5726f7fe7d98d (diff)
soc/intel/cannonlake: add initial ASL methods for SCS, GPIO
Add ACPI methods for gpio, scs and pcr. TEST=Boot to OS. Change-Id: I0dc31662dd3f5dbb3bda43aa8cf507128facde51 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/21685 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/include')
-rw-r--r--src/soc/intel/cannonlake/include/soc/gpio_defs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_defs.h
index 6e84f838f1..9c070171b5 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_defs.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_defs.h
@@ -248,4 +248,6 @@
#define GPI_SMI_EN_0 0x1A0
#define PAD_CFG_BASE 0x600
+#define GPIORXSTATE_MASK 0x1
+#define GPIORXSTATE_SHIFT 1
#endif