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authorReka Norman <rekanorman@chromium.org>2023-09-22 15:26:54 +1000
committerFelix Held <felix-coreboot@felixheld.de>2023-10-04 15:29:32 +0000
commita5215c4eb3a4cbe0ef32257c4da2e5a6e0febdef (patch)
treef41a03dd91791e30e8483a2623d010af9b590fe9 /src/soc/intel/cannonlake/include
parent773d4b8fb00613b373d81e877a7014c338542e86 (diff)
soc/intel: Move USB wake methods to a common ASL file
The ACPI methods for enabling USB wake are identical on ADL, CNL and SKL. Move them to a common ASL file so they can be reused more easily on other SoCs. Also move the USB_PORT_WAKE_ENABLE macro used to create enable bitmasks in devicetree to a common header. BUG=b:300844110 TEST=Use abuild to build kinox, puff, and fizz with and without this change. Check the generated dsdt.aml is unchanged. Change-Id: Iabdfe2bece7fafc284ddf04382f1bbcacc370cce Signed-off-by: Reka Norman <rekanorman@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78085 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/soc/intel/cannonlake/include')
-rw-r--r--src/soc/intel/cannonlake/include/soc/usb.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/usb.h b/src/soc/intel/cannonlake/include/soc/usb.h
index 20b3149dd7..3f020ef7c1 100644
--- a/src/soc/intel/cannonlake/include/soc/usb.h
+++ b/src/soc/intel/cannonlake/include/soc/usb.h
@@ -186,11 +186,4 @@ struct usb3_port_config {
.gen2_rx_filter_sel = 0x44, \
}
-/*
- * Set bit corresponding to USB port in wake enable bitmap. Bit 0 corresponds
- * to Port 1, Bit n corresponds to Port (n+1). This bitmap is later used to
- * decide what ports need to set PORTSCN/PORTSCXUSB3 register bits.
- */
-#define USB_PORT_WAKE_ENABLE(x) (1 << ((x) - 1))
-
#endif