diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2017-11-27 12:14:58 -0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-12-13 20:56:25 +0000 |
| commit | 1b75994b4e62d29f78517e50de6ea90d84aa08a6 (patch) | |
| tree | 60443fed8809f20dc6809bfbeb2f8f8b42ec526a /src/soc/intel/cannonlake/include | |
| parent | 562b168a77764d6bbf2624c9b63b1003f85c021b (diff) | |
src/soc/intel/cannonlake: Add _PRW for CNVi
Add _PRW so that wake on WLAN feature works.
TEST=Boot to OS and check if WLAN device wakes host.
Change-Id: Id6689754d1c4100615e4e4ae5a7f9846f4bf785f
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/22611
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake/include')
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/pm.h | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/pm.h b/src/soc/intel/cannonlake/include/soc/pm.h index 378fac9139..1494d561d8 100644 --- a/src/soc/intel/cannonlake/include/soc/pm.h +++ b/src/soc/intel/cannonlake/include/soc/pm.h @@ -17,14 +17,6 @@ #ifndef _SOC_PM_H_ #define _SOC_PM_H_ -#include <arch/acpi.h> -#include <arch/io.h> -#include <compiler.h> -#include <soc/gpe.h> -#include <soc/iomap.h> -#include <soc/smbus.h> -#include <soc/pmc.h> - #define PM1_STS 0x00 #define WAK_STS (1 << 15) #define PCIEXPWAK_STS (1 << 14) @@ -116,7 +108,8 @@ #define WADT_EN (1 << 18) #define GPIO_T2_EN (1 << 15) #define ESPI_EN (1 << 14) -#define PME_B0_EN (1 << 13) +#define PME_B0_EN_BIT 13 +#define PME_B0_EN (1 << PME_B0_EN_BIT) #define ME_SCI_EN (1 << 12) #define PME_EN (1 << 11) #define BATLOW_EN (1 << 10) @@ -145,6 +138,16 @@ #define PSS_LATENCY_TRANSITION 10 #define PSS_LATENCY_BUSMASTER 10 +#if !defined(__ACPI__) + +#include <arch/acpi.h> +#include <arch/io.h> +#include <compiler.h> +#include <soc/gpe.h> +#include <soc/iomap.h> +#include <soc/smbus.h> +#include <soc/pmc.h> + struct chipset_power_state { uint16_t pm1_sts; uint16_t pm1_en; @@ -168,4 +171,5 @@ uint16_t smbus_tco_regs(void); /* Set the DISB after DRAM init */ void pmc_set_disb(void); +#endif /* !defined(__ACPI__) */ #endif |