diff options
author | Lijian Zhao <lijian.zhao@intel.com> | 2017-08-17 14:25:24 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-13 03:09:15 +0000 |
commit | 2b074d90ae0d20f2d3171f2ddc5d0b6c0d3b78b0 (patch) | |
tree | 1d06a3e7633e227a071e60bf6325ae345cc12e6c /src/soc/intel/cannonlake/include/soc/pmc.h | |
parent | 6732b4fcdcb48b21631ca73cd1ec37f497d21d3e (diff) |
soc/intel/cannonlake: Add common ACPI support for CNL
Basic ACPI support for CNL on top of common ACPI, which will establish
a root of FADT table, fill MADT entry, create gnvs field, record wake
status and convert device names into DSDT dev definitions.
Change-Id: Ibc16d2afdd3cb9bad2ecb85cf320c88504409707
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21076
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/include/soc/pmc.h')
-rw-r--r-- | src/soc/intel/cannonlake/include/soc/pmc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/pmc.h b/src/soc/intel/cannonlake/include/soc/pmc.h index b8e49c2286..69954db6ce 100644 --- a/src/soc/intel/cannonlake/include/soc/pmc.h +++ b/src/soc/intel/cannonlake/include/soc/pmc.h @@ -119,6 +119,8 @@ #define GBLRST_CAUSE0_THERMTRIP (1 << 5) #define GBLRST_CAUSE1 0x1928 +#define IRQ_REG ACTL +#define SCI_IRQ_ADJUST 0 #define ACTL 0x1BD8 #define PWRM_EN (1 << 8) #define ACPI_EN (1 << 7) |