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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2018-12-31 10:45:19 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-15 17:45:14 +0000 |
| commit | dcfff3739be63c2d42e16860243d7bec98c7ba44 (patch) | |
| tree | 57fa974627e6028291ff8d6b6b57439d01451c6d /src/soc/intel/cannonlake/gspi.c | |
| parent | 9a8c5e7ac0f559898c4d5fcb99a51e4dc472f51f (diff) | |
src/superio/ite/common: Prepare for ITE IT8786E SuperIO
Introduce 7bit Slope PWM registers. New ITE SuperIO may have contiguous
7bit values for PWM slope.
Add option to enable External Sensor SMBus Host.
Update/add registers macros for IT8786E-F which are not backwards
compatible.
Change-Id: I68fbfe62dfa05d0c166abaefbdc2ab873114b236
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30553
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/cannonlake/gspi.c')
0 files changed, 0 insertions, 0 deletions