diff options
| author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2020-05-09 16:37:30 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-26 15:02:54 +0000 |
| commit | 309ccf74dd7c25874572c6a62ffc7042dcdadc66 (patch) | |
| tree | 7b1e79798c0607ef794bb4cd24c575713a552db5 /src/soc/intel/cannonlake/fsp_params.c | |
| parent | 7d054bd38f5cfe36f6abd4f4422c463243bc3749 (diff) | |
cannonlake: update processor power limits configuration
Update processor power limit configuration parameters based on
common code base support for Intel Cannonlake SoC based platforms.
BRANCH=None
BUG=None
TEST=Built and tested on drallion system
Change-Id: Iac6e6f81343fcd769619e9d7ac339430966834f6
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41235
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/fsp_params.c')
| -rw-r--r-- | src/soc/intel/cannonlake/fsp_params.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index b7e9ad8d8b..8788838c3f 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -7,6 +7,7 @@ #include <fsp/api.h> #include <fsp/util.h> #include <intelblocks/lpss.h> +#include <intelblocks/power_limit.h> #include <intelblocks/xdci.h> #include <intelpch/lockdown.h> #include <soc/intel/common/vbt.h> @@ -152,11 +153,13 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) mainboard_silicon_init_params(params); + const struct soc_power_limits_config *soc_config; + soc_config = &config->power_limits_config; /* Set PsysPmax if it is available from DT */ - if (config->psys_pmax) { - printk(BIOS_DEBUG, "psys_pmax = %dW\n", config->psys_pmax); + if (soc_config->psys_pmax) { + printk(BIOS_DEBUG, "psys_pmax = %dW\n", soc_config->psys_pmax); /* PsysPmax is in unit of 1/8 Watt */ - tconfig->PsysPmax = config->psys_pmax * 8; + tconfig->PsysPmax = soc_config->psys_pmax * 8; } /* Unlock upper 8 bytes of RTC RAM */ |