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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-09 21:50:29 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-12 19:20:44 +0000 |
| commit | 8c8b34996dbc1ec1be2b9d7f2ce9b4a1d532501c (patch) | |
| tree | 17ade5add360613b65d030b9bc3a57856e90ab59 /src/soc/intel/cannonlake/cpu.c | |
| parent | d838c8f4f429e7023c10a462975631dd617f22be (diff) | |
mb/clevo/l140cu: clean up memcfg
The DQ and DQS byte maps do not apply to DDR4 configurations, thus
simply drop them.
Also drop ECT, as it's already initialized to zero and can't be used on
DDR4 anyway.
Further, trim down all the meaningless and/or wrong comments.
Change-Id: I32f1b7bb46eaaf0f0ecad1df310f5de988f64c85
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46249
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/cpu.c')
0 files changed, 0 insertions, 0 deletions