diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2018-06-08 17:57:37 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2018-06-22 01:58:17 +0000 |
| commit | f699c14c03a78549b0e5ed32cf9714473127c618 (patch) | |
| tree | 681009836bbd6a92e49ffe3b9dc03145274ad38a /src/soc/intel/cannonlake/chip.h | |
| parent | b775a62bb9fe07785b83767d58573937c5783bec (diff) | |
soc/intel/common/block/cpu: Add option to skip coreboot AP init
SoC users from IOTG team is looking forward for a solution to skip
coreboot AP initialization flow and make use of FSPS-UPD to
perform AP reset.
TEST=Assign use_fsp_mp_init=1 to ensure coreboot is not bringing APs
out of reset.
Change-Id: Ibc8cd411e802fb682436a933073922b2693ba994
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/26644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.h')
| -rw-r--r-- | src/soc/intel/cannonlake/chip.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index a269659f12..4704d1cef6 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -201,12 +201,6 @@ struct soc_intel_cannonlake_config { uint8_t TcoIrqSelect; uint8_t TcoIrqEnable; - /* - * Option for mainboard to skip coreboot MP initialization - * 0 = Make use of coreboot MP Init - * 1 = Make use of FSP MP Init - */ - uint8_t use_fsp_mp_init; /* VrConfig Settings for 5 domains * 0 = System Agent, 1 = IA Core, 2 = Ring, * 3 = GT unsliced, 4 = GT sliced */ |