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authorDuncan Laurie <dlaurie@chromium.org>2017-08-15 13:32:26 -0700
committerDuncan Laurie <dlaurie@chromium.org>2017-08-17 18:31:07 +0000
commitdc1e6bc2774e0fad2eec31d281c4e3ed22c16fe7 (patch)
tree1ad492ffc9f14eec3efbb4fd3addea6c79dc22be /src/soc/intel/cannonlake/chip.h
parenta102a029c5706a97ca1df6f0939def49b851a656 (diff)
intel/common/block/fast_spi: Add config option to disable write status
Chrome OS systems rely on the write status register to enable/disable flash write protection and disabling this opcode breaks the ability to enable or disable write protection with flashrom. Add a configure option for this feature that will disable the opcode for Write Status commands unless CONFIG_CHROMEOS is enabled. Tested to ensure that a default build without CONFIG_CHROMEOS has this option enabled while a build with CONFIG_CHROMEOS does not. Also ensured that when this option is disabled (for Chrome OS) then flashrom can be used with the --wp-enable and --wp-disable commands, depending on the state of the external write protect pin. Change-Id: Ia2ef3c3b1e10fba2c437e083f3537022f1fce84a Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/21021 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.h')
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