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author | Aaron Durbin <adurbin@chromium.org> | 2018-08-09 12:23:43 -0600 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2018-08-10 23:00:46 +0000 |
commit | 6539edef41d1046118f9ac2b53d0487646714839 (patch) | |
tree | 031fc9400702f37b9386cb7c661ffeae635a78dc /src/soc/intel/cannonlake/chip.h | |
parent | 3d45000c9cab2e5e5cac11a0a6af9abdce8aa80d (diff) |
mb/google/octopus: add support for new shared memory config
Allow for shared dram configuration by introducing a new table
that collapses the common settings after removing the part
numbers. When employing this scheme the part number comes
from CBI.
BUG=b:112203105
TEST=Placed part number in cbi. Faked out memory sku id. And enabled
DRAM part num always in cbi. Everything checked out.
Change-Id: I5229695ce3eb686421b89ac55d8df4b9fcec705c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/27991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.h')
0 files changed, 0 insertions, 0 deletions