diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-07-01 08:41:48 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-10 21:54:44 +0000 |
| commit | bd5b4aa683a634a73a6a63d1f197e2bb74b6a80e (patch) | |
| tree | 6fea1d513a144b29d4cabe2dc0a14e3a526a392f /src/soc/intel/cannonlake/chip.c | |
| parent | b7b5115360baa1ea0b9e8e554a12e9ac6da8fe87 (diff) | |
soc/intel/cannonlake: Switch PMC to use device callbacks
Now that the PMC device is marked as hidden in devicetrees, the device
callbacks can be used instead of BOOT_STATE_INIT_ENTRY callbacks.
Note that this moves PMC initialization from BS_DEV_INIT_CHIPS to
BS_DEV_ENUMERATE, which aligns with other Intel SoCs.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: If292728ad975ba803fed6abea879f6f634470a11
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56009
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.c')
| -rw-r--r-- | src/soc/intel/cannonlake/chip.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index aa6fb1b357..306d8eb6a2 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -195,6 +195,9 @@ static void soc_enable(struct device *dev) dev->ops = &cpu_bus_ops; else if (dev->path.type == DEVICE_PATH_GPIO) block_gpio_enable(dev); + else if (dev->path.type == DEVICE_PATH_PCI && + dev->path.pci.devfn == PCH_DEVFN_PMC) + dev->ops = &pmc_ops; } struct chip_operations soc_intel_cannonlake_ops = { |