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authorSubrata Banik <subrata.banik@intel.com>2018-05-22 16:18:16 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-05-27 01:48:21 +0000
commit98376b84592aea85089f047957c39b3889136574 (patch)
treed4356426011f236163a3c8901e6662a88dc854c3 /src/soc/intel/cannonlake/chip.c
parent8173ad1ed79e6d191c5ed7d4a06c20d0536b485b (diff)
soc/intel/cannonlake: Select common XHCI code
This patch select CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI to include common xhci code block. BUG=b:78109109 BRANCH=none TEST=Build and boot cnlrvp Change-Id: I7f1e59792159dae5835fbbe7fcb1604fc01893ba Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/26465 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.c')
-rw-r--r--src/soc/intel/cannonlake/chip.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index b64d804d61..fd9ce526f5 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -20,6 +20,7 @@
#include <device/pci.h>
#include <fsp/api.h>
#include <fsp/util.h>
+#include <intelblocks/acpi.h>
#include <intelblocks/xdci.h>
#include <romstage_handoff.h>
#include <soc/intel/common/vbt.h>
@@ -28,7 +29,7 @@
#include <string.h>
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
-static const char *soc_acpi_name(const struct device *dev)
+const char *soc_acpi_name(const struct device *dev)
{
if (dev->path.type == DEVICE_PATH_DOMAIN)
return "PCI0";