soc/intel/cannonlake: Move the FSP related callbacks to separate files

Move funtions callbacks used to override FSP upd values to
separate files. This serves as a base change for SoCs for which
FSP is still under development, and hence the FSP header files
are not available yet and in turn the UPDs cannot be referred.
These newer SoCs will implement empty callbacks. The code will
compile with basic header files which only include the architectural
FSP structures.

This allows plugging in these separate files for compilation in an
environment where FSP header files are available.
The fact is, FSP header files are not released externally until PRQ.
However the teams at intel and some partners have access to the development
version of these files. This code refactor helps to continue development
on the pre-PRQ silicons and submit related code to coreboot.org.

BUG=None
BRANCH=None
TEST=Build for cnlrvp

Change-Id: Iffadc57f6986e688aa1bbe4e5444d105386ad92e
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/28661
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

1 files changed, 0 insertions, 193 deletions

diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index 34a2fe00c5..014805f593 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -95,43 +95,6 @@ const char *soc_acpi_name(const struct device *dev)
 }
 #endif
 
-static void parse_devicetree(FSP_S_CONFIG *params)
-{
-	struct device *dev = SA_DEV_ROOT;
-	if (!dev) {
-		printk(BIOS_ERR, "Could not find root device\n");
-		return;
-	}
-
-	const config_t *config = dev->chip_info;
-	const int SerialIoDev[] = {
-		PCH_DEVFN_I2C0,
-		PCH_DEVFN_I2C1,
-		PCH_DEVFN_I2C2,
-		PCH_DEVFN_I2C3,
-		PCH_DEVFN_I2C4,
-		PCH_DEVFN_I2C5,
-		PCH_DEVFN_GSPI0,
-		PCH_DEVFN_GSPI1,
-		PCH_DEVFN_GSPI2,
-		PCH_DEVFN_UART0,
-		PCH_DEVFN_UART1,
-		PCH_DEVFN_UART2
-	};
-
-	for (int i = 0; i < ARRAY_SIZE(SerialIoDev); i++) {
-		dev = dev_find_slot(0, SerialIoDev[i]);
-		if (!dev->enabled) {
-			params->SerialIoDevMode[i] = PchSerialIoDisabled;
-			continue;
-		}
-		params->SerialIoDevMode[i] = PchSerialIoPci;
-		if (config->SerialIoDevMode[i] == PchSerialIoAcpi ||
-		    config->SerialIoDevMode[i] == PchSerialIoHidden)
-			params->SerialIoDevMode[i] = config->SerialIoDevMode[i];
-	}
-}
-
 void soc_init_pre_device(void *chip_info)
 {
 	/* Perform silicon specific init. */
@@ -177,159 +140,3 @@ struct chip_operations soc_intel_cannonlake_ops = {
 	.enable_dev	= &soc_enable,
 	.init		= &soc_init_pre_device,
 };
-
-/* UPD parameters to be initialized before SiliconInit */
-void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
-{
-	int i;
-	FSP_S_CONFIG *params = &supd->FspsConfig;
-	FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig;
-	struct device *dev = SA_DEV_ROOT;
-	config_t *config = dev->chip_info;
-
-	/* Parse device tree and enable/disable devices */
-	parse_devicetree(params);
-
-	/* Load VBT before devicetree-specific config. */
-	params->GraphicsConfigPtr = (uintptr_t)vbt_get();
-
-	/* Set USB OC pin to 0 first */
-	for (i = 0; i < ARRAY_SIZE(params->Usb2OverCurrentPin); i++) {
-		params->Usb2OverCurrentPin[i] = 0;
-	}
-
-	for (i = 0; i < ARRAY_SIZE(params->Usb3OverCurrentPin); i++) {
-		params->Usb3OverCurrentPin[i] = 0;
-	}
-
-	mainboard_silicon_init_params(params);
-
-	/* Unlock upper 8 bytes of RTC RAM */
-	params->PchLockDownRtcMemoryLock = 0;
-
-	/* SATA */
-	dev = dev_find_slot(0, PCH_DEVFN_SATA);
-	if (!dev)
-		params->SataEnable = 0;
-	else {
-		params->SataEnable = dev->enabled;
-		params->SataMode = config->SataMode;
-		params->SataSalpSupport = config->SataSalpSupport;
-		memcpy(params->SataPortsEnable, config->SataPortsEnable,
-			sizeof(params->SataPortsEnable));
-		memcpy(params->SataPortsDevSlp, config->SataPortsDevSlp,
-			sizeof(params->SataPortsDevSlp));
-	}
-
-	/* Lan */
-	dev = dev_find_slot(0, PCH_DEVFN_GBE);
-	if (!dev)
-		params->PchLanEnable = 0;
-	else
-		params->PchLanEnable = dev->enabled;
-
-	/* Audio */
-	params->PchHdaDspEnable = config->PchHdaDspEnable;
-	params->PchHdaAudioLinkHda = config->PchHdaAudioLinkHda;
-	params->PchHdaAudioLinkDmic0 = config->PchHdaAudioLinkDmic0;
-	params->PchHdaAudioLinkDmic1 = config->PchHdaAudioLinkDmic1;
-	params->PchHdaAudioLinkSsp0 = config->PchHdaAudioLinkSsp0;
-	params->PchHdaAudioLinkSsp1 = config->PchHdaAudioLinkSsp1;
-	params->PchHdaAudioLinkSsp2 = config->PchHdaAudioLinkSsp2;
-	params->PchHdaAudioLinkSndw1 = config->PchHdaAudioLinkSndw1;
-	params->PchHdaAudioLinkSndw2 = config->PchHdaAudioLinkSndw2;
-	params->PchHdaAudioLinkSndw3 = config->PchHdaAudioLinkSndw3;
-	params->PchHdaAudioLinkSndw4 = config->PchHdaAudioLinkSndw4;
-
-	/* S0ix */
-	params->PchPmSlpS0Enable = config->s0ix_enable;
-
-	/* USB */
-	for (i = 0; i < ARRAY_SIZE(config->usb2_ports); i++) {
-		params->PortUsb20Enable[i] = config->usb2_ports[i].enable;
-		params->Usb2OverCurrentPin[i] = config->usb2_ports[i].ocpin;
-		params->Usb2AfePetxiset[i] = config->usb2_ports[i].pre_emp_bias;
-		params->Usb2AfeTxiset[i] = config->usb2_ports[i].tx_bias;
-		params->Usb2AfePredeemp[i] =
-			config->usb2_ports[i].tx_emp_enable;
-		params->Usb2AfePehalfbit[i] = config->usb2_ports[i].pre_emp_bit;
-	}
-
-	for (i = 0; i < ARRAY_SIZE(config->usb3_ports); i++) {
-		params->PortUsb30Enable[i] = config->usb3_ports[i].enable;
-		params->Usb3OverCurrentPin[i] = config->usb3_ports[i].ocpin;
-		if (config->usb3_ports[i].tx_de_emp) {
-			params->Usb3HsioTxDeEmphEnable[i] = 1;
-			params->Usb3HsioTxDeEmph[i] =
-				config->usb3_ports[i].tx_de_emp;
-		}
-		if (config->usb3_ports[i].tx_downscale_amp) {
-			params->Usb3HsioTxDownscaleAmpEnable[i] = 1;
-			params->Usb3HsioTxDownscaleAmp[i] =
-				config->usb3_ports[i].tx_downscale_amp;
-		}
-	}
-
-	/* Enable xDCI controller if enabled in devicetree and allowed */
-	dev = dev_find_slot(0, PCH_DEVFN_USBOTG);
-	if (!xdci_can_enable())
-		dev->enabled = 0;
-	params->XdciEnable = dev->enabled;
-
-	/* PCI Express */
-	for (i = 0; i < ARRAY_SIZE(config->PcieClkSrcUsage); i++) {
-		if (config->PcieClkSrcUsage[i] == 0)
-			config->PcieClkSrcUsage[i] = PCIE_CLK_NOTUSED;
-	}
-	memcpy(params->PcieClkSrcUsage, config->PcieClkSrcUsage,
-	       sizeof(config->PcieClkSrcUsage));
-	memcpy(params->PcieClkSrcClkReq, config->PcieClkSrcClkReq,
-	       sizeof(config->PcieClkSrcClkReq));
-
-	/* eMMC and SD */
-	dev = dev_find_slot(0, PCH_DEVFN_EMMC);
-	if (!dev)
-		params->ScsEmmcEnabled = 0;
-	else {
-		params->ScsEmmcEnabled = dev->enabled;
-		params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled;
-		params->PchScsEmmcHs400DllDataValid = config->EmmcHs400DllNeed;
-		if (config->EmmcHs400DllNeed == 1) {
-			params->PchScsEmmcHs400RxStrobeDll1 =
-				config->EmmcHs400RxStrobeDll1;
-			params->PchScsEmmcHs400TxDataDll =
-				config->EmmcHs400TxDataDll;
-		}
-	}
-
-	dev = dev_find_slot(0, PCH_DEVFN_SDCARD);
-	if (!dev)
-		params->ScsSdCardEnabled = 0;
-	else
-		params->ScsSdCardEnabled = dev->enabled;
-
-	dev = dev_find_slot(0, PCH_DEVFN_UFS);
-	if (!dev)
-		params->ScsUfsEnabled = 0;
-	else
-		params->ScsUfsEnabled = dev->enabled;
-
-	params->Heci3Enabled = config->Heci3Enabled;
-	params->Device4Enable = config->Device4Enable;
-	params->SkipMpInit = !chip_get_fsp_mp_init();
-
-	/* VrConfig Settings for 5 domains
-	 * 0 = System Agent, 1 = IA Core, 2 = Ring,
-	 * 3 = GT unsliced,  4 = GT sliced */
-	for (i = 0; i < ARRAY_SIZE(config->domain_vr_config); i++)
-		fill_vr_domain_config(params, i, &config->domain_vr_config[i]);
-
-	/* Vt-D config */
-	tconfig->VtdDisable = config->VtdDisable;
-}
-
-/* Mainboard GPIO Configuration */
-__weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
-{
-	printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}