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authorRonak Kanabar <ronak.kanabar@intel.com>2019-02-04 16:06:50 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-02-24 04:49:37 +0000
commitf606a2f5e654d1240f17bd6852c2ade0c2d22b32 (patch)
treee4907fd7b73015a0c994d633f640ad4a094ba02a /src/soc/intel/cannonlake/bootblock
parent128bb2a7ca4cad75c1769f7dea0e4350b9180260 (diff)
soc/intel/common: Include cometlake SA IDs
Add cometlake specific SA IDs Change-Id: I1fbbab8a7797b36a9eacbd1c6a0644466f2fe6b1 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/31226 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake/bootblock')
-rw-r--r--src/soc/intel/cannonlake/bootblock/report_platform.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index a4328cb696..faa4924890 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -57,6 +57,13 @@ static struct {
{ PCI_DEVICE_ID_INTEL_WHL_ID_Wx2, "Whiskeylake W (2+2)" },
{ PCI_DEVICE_ID_INTEL_CFL_ID_H, "Coffeelake-H" },
{ PCI_DEVICE_ID_INTEL_CFL_ID_S, "Coffeelake-S" },
+ { PCI_DEVICE_ID_INTEL_CML_ULT, "CometLake-U (4+2)" },
+ { PCI_DEVICE_ID_INTEL_CML_ULT_6_2, "CometLake-U (6+2)" },
+ { PCI_DEVICE_ID_INTEL_CML_ULX, "CometLake-ULX (4+2)" },
+ { PCI_DEVICE_ID_INTEL_CML_S, "CometLake-S (6+2)" },
+ { PCI_DEVICE_ID_INTEL_CML_S_10_2, "CometLake-S (10+2)" },
+ { PCI_DEVICE_ID_INTEL_CML_H, "CometLake-H (6+2)" },
+ { PCI_DEVICE_ID_INTEL_CML_H_8_2, "CometLake-H (8+2)" },
};
static struct {
@@ -86,6 +93,24 @@ static struct {
{ PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT1" },
{ PCI_DEVICE_ID_INTEL_CFL_H_GT2, "Coffeelake-H GT2" },
{ PCI_DEVICE_ID_INTEL_CFL_S_GT2, "Coffeelake-S GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_1, "CometLake ULT GT1" },
+ { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_2, "CometLake ULT GT1" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_1, "CometLake ULT GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_2, "CometLake ULT GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_3, "CometLake ULT GT1" },
+ { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_4, "CometLake ULT GT1" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_3, "CometLake ULT GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_4, "CometLake ULT GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT1_ULX_1, "CometLake ULX GT1" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_ULX_1, "CometLake ULX GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT1_S_1, "CometLake S GT1" },
+ { PCI_DEVICE_ID_INTEL_CML_GT1_S_2, "CometLake S GT1" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_S_1, "CometLake S GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_S_2, "CometLake S GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT1_H_1, "CometLake H GT1" },
+ { PCI_DEVICE_ID_INTEL_CML_GT1_H_2, "CometLake H GT1" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_H_1, "CometLake H GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_H_2, "CometLake H GT2" },
};
static uint8_t get_dev_revision(pci_devfn_t dev)