diff options
| author | Maulik <maulik.v.vaghela@intel.com> | 2018-01-05 22:40:35 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2018-08-10 06:31:01 +0000 |
| commit | fc19ab5f3465d8f8a861f7492634d0afe847f56d (patch) | |
| tree | 0002bba9ae5cf98224f6defaa677338bffe65662 /src/soc/intel/cannonlake/bootblock | |
| parent | e819c857607bb4a1c2911e2073aa588f74789ee1 (diff) | |
src/soc/intel: Add new device IDs to support coffeelake
1. Add new device IDs for SATA, GT and Northbridge to pci_ids.h
2. Add entry to identify CFL U GT and CPU to respective files
3. Add entry to identify CFL U to report_platform.c
BUG=none
BRANCH=none
TEST=Boot to CFL U RVP board with this patch and check if coreboot is
able to enumerate various devices and display correct component names properly
in serial logs.
Change-Id: I47c97fb9eb813587cd655e2bce05a686091619ed
Signed-off-by: Maulik <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/27522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake/bootblock')
| -rw-r--r-- | src/soc/intel/cannonlake/bootblock/report_platform.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index 2c6397d918..d7daa18a56 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -36,7 +36,8 @@ static struct { { CPUID_CANNONLAKE_B0, "Cannonlake B0" }, { CPUID_CANNONLAKE_C0, "Cannonlake C0" }, { CPUID_CANNONLAKE_D0, "Cannonlake D0" }, - { CPUID_WHISKEYLAKE_W0, "Whiskeylake W0" }, + { CPUID_COFFEELAKE_D0, "Coffeelake D0" }, + { CPUID_WHISKEYLAKE_W0, "Whiskeylake W0"}, }; static struct { @@ -45,7 +46,8 @@ static struct { } mch_table[] = { { PCI_DEVICE_ID_INTEL_CNL_ID_U, "Cannonlake-U" }, { PCI_DEVICE_ID_INTEL_CNL_ID_Y, "Cannonlake-Y" }, - { PCI_DEVICE_ID_INTEL_WHL_ID_W, "Whiskeylake" }, + { PCI_DEVICE_ID_INTEL_CFL_ID_U, "Coffeelake U (4+3e)"}, + { PCI_DEVICE_ID_INTEL_WHL_ID_W, "Whiskeylake"}, }; static struct { @@ -69,7 +71,8 @@ static struct { { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_2, "Cannonlake ULT GT1.5" }, { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3, "Cannonlake ULT GT1" }, { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4, "Cannonlake ULT GT0.5" }, - { PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT1" }, + { PCI_DEVICE_ID_INTEL_CFL_GT2_ULT, "Coffeelake ULT GT2"}, + { PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT1"}, }; static uint8_t get_dev_revision(pci_devfn_t dev) |