diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2017-07-11 12:26:56 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-08-07 17:53:13 +0000 |
| commit | e88fa490a5248c0de6d51b07d4ede885f09637b6 (patch) | |
| tree | b08ea849c27aa06f34731e90991d0c087d665b1e /src/soc/intel/cannonlake/bootblock | |
| parent | 8da22868851e752ce7c633551f74ef3ef8bf4b6c (diff) | |
soc/intel/cannonlake: Add memory map support
Calculate the top of ram from output of Fsp reserved memory range.
Change-Id: I0dcc8f737c5811c9010cc4a20ea0126ab3f90f14
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/20533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/bootblock')
| -rw-r--r-- | src/soc/intel/cannonlake/bootblock/pch.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c index d294cea46b..21a06e4ff5 100644 --- a/src/soc/intel/cannonlake/bootblock/pch.c +++ b/src/soc/intel/cannonlake/bootblock/pch.c @@ -196,4 +196,6 @@ void pch_early_init(void) enable_rtc_upper_bank(); heci_init(HECI1_BASE_ADDRESS); + + clear_cbmem_top(); } |