diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2018-05-24 12:21:06 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-20 15:51:48 +0000 |
| commit | afa07f7ae48d9e9d79aef712933777a56551f5be (patch) | |
| tree | f7f0342eb23f33d3c2834617e0f8e69a58b4ff52 /src/soc/intel/cannonlake/bootblock | |
| parent | 55a8d8a772322e5ceb71c28785b1815970c468c5 (diff) | |
soc/intel/common/block: Move common uart function to block/uart
This patch moves uart functions which are common across multiple soc to
block/uart. This will remove redundant code copy from soc
{skylake/apollolake/cannonlake}.
BUG=b:78109109
BRANCH=none
TEST=Build and boot on KBL/APL/CNL platform.
Change-Id: I109d0e5c942e499cb763bde47cb7d53dfbf5cef6
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/26164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/bootblock')
| -rw-r--r-- | src/soc/intel/cannonlake/bootblock/bootblock.c | 5 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/bootblock/pch.c | 1 |
2 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/bootblock.c b/src/soc/intel/cannonlake/bootblock/bootblock.c index b7e77976b0..0aac186b42 100644 --- a/src/soc/intel/cannonlake/bootblock/bootblock.c +++ b/src/soc/intel/cannonlake/bootblock/bootblock.c @@ -15,6 +15,7 @@ #include <bootblock_common.h> #include <intelblocks/gspi.h> +#include <intelblocks/uart.h> #include <soc/bootblock.h> #include <soc/iomap.h> #include <soc/pch.h> @@ -31,8 +32,8 @@ void bootblock_soc_early_init(void) bootblock_pch_early_init(); bootblock_cpu_init(); pch_early_iorange_init(); - if (IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM)) - pch_uart_init(); + if (IS_ENABLED(CONFIG_UART_DEBUG)) + uart_bootblock_init(); } void bootblock_soc_init(void) diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c index eb67012781..033f69aaf5 100644 --- a/src/soc/intel/cannonlake/bootblock/pch.c +++ b/src/soc/intel/cannonlake/bootblock/pch.c @@ -80,6 +80,7 @@ void bootblock_pch_early_init(void) gspi_early_bar_init(); p2sb_enable_bar(); p2sb_configure_hpet(); + /* * Enabling PWRM Base for accessing * Global Reset Cause Register. |