soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers

Add a function in gpio ASL library to enable/disable pad Rx/Tx Buffers.

BUG=b:123350329

Change-Id: I6c40d79debb61b0c4e96e485b410d446b77d9cf6
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/c/31619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>

1 files changed, 44 insertions, 0 deletions

diff --git a/src/soc/intel/cannonlake/acpi/gpio_op.asl b/src/soc/intel/cannonlake/acpi/gpio_op.asl
index 0c89e998c1..b024367181 100644
--- a/src/soc/intel/cannonlake/acpi/gpio_op.asl
+++ b/src/soc/intel/cannonlake/acpi/gpio_op.asl
@@ -94,3 +94,47 @@ Method (GPMO, 2, Serialized)
 	And (ShiftLeft (Arg1, GPIOPADMODE_SHIFT, Arg1), GPIOPADMODE_MASK, Arg1)
 	Or (Local0, Arg1, VAL0)
 }
+
+/*
+ * Enable/Disable Tx buffer
+ * Arg0 - GPIO Number
+ * Arg1 - TxBuffer state
+ *     0 = Disable Tx Buffer
+ *     1 = Enable Tx Buffer
+ */
+Method (GTXE, 2, Serialized)
+{
+	OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
+	Field (PREG, AnyAcc, NoLock, Preserve)
+	{
+		VAL0, 32
+	}
+
+	If (LEqual (Arg1, 1)) {
+		And (Not (GPIOTXBUFDIS_MASK), VAL0, VAL0)
+	} ElseIf (LEqual (Arg1, 0)){
+		Or (GPIOTXBUFDIS_MASK, VAL0, VAL0)
+	}
+}
+
+/*
+ * Enable/Disable Rx buffer
+ * Arg0 - GPIO Number
+ * Arg1 - RxBuffer state
+ *     0 = Disable Rx Buffer
+ *     1 = Enable Rx Buffer
+ */
+Method (GRXE, 2, Serialized)
+{
+	OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
+	Field (PREG, AnyAcc, NoLock, Preserve)
+	{
+		VAL0, 32
+	}
+
+	If (LEqual (Arg1, 1)) {
+		And (Not (GPIORXBUFDIS_MASK), VAL0, VAL0)
+	} ElseIf (LEqual (Arg1, 0)){
+		Or (GPIORXBUFDIS_MASK, VAL0, VAL0)
+	}
+}