diff options
| author | praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com> | 2018-10-01 21:49:38 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-25 09:21:24 +0000 |
| commit | cf04c61170dc8efb5f94aa31d441312479bed10e (patch) | |
| tree | 3f8a1927398a33f7c3d1f561b3d7fb471d681b1a /src/soc/intel/cannonlake/acpi | |
| parent | 74258d789cf3da7f1885e0fb405eb63205106a9d (diff) | |
soc/intel/cannonlake: Enable S4 sleep state support
Add ACPI entry in sleepstates.asl to support S4 (hibernate).
TEST: boot to Windows on CFL RVP11 & RVP8, verified hibernate functionality.
Change-Id: I751c774e6ec7fd89ac3af5a619033bd38a759281
Signed-off-by: praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com>
Reviewed-on: https://review.coreboot.org/28846
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel/cannonlake/acpi')
| -rw-r--r-- | src/soc/intel/cannonlake/acpi/sleepstates.asl | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/acpi/sleepstates.asl b/src/soc/intel/cannonlake/acpi/sleepstates.asl index d19f080d5d..2a351b6c99 100644 --- a/src/soc/intel/cannonlake/acpi/sleepstates.asl +++ b/src/soc/intel/cannonlake/acpi/sleepstates.asl @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2017 Intel Corp. + * Copyright (C) 2017-2018 Intel Corp. * * * This program is free software; you can redistribute it and/or modify @@ -17,4 +17,5 @@ Name (\_S0, Package () { 0x0, 0x0, 0x0, 0x0 }) Name (\_S3, Package () { 0x5, 0x5, 0x0, 0x0 }) +Name (\_S4, Package () { 0x6, 0x6, 0x0, 0x0 }) Name (\_S5, Package () { 0x7, 0x7, 0x0, 0x0 }) |