diff options
| author | Vaibhav Shankar <vaibhav.shankar@intel.com> | 2018-03-19 18:56:38 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-03-23 08:56:19 +0000 |
| commit | 2da6ec40bbbf9b30afd4372587235d14a455f88f (patch) | |
| tree | a6b0d1879ba33b6bb9c07c5750bfd4df338a8638 /src/soc/intel/cannonlake/acpi.c | |
| parent | 83308660677056ccaea1a70494dac7874be43f41 (diff) | |
soc/intel/cannonlake: Enable low power S0 Idle capability
This patch sets the ACPI FADT flag ACPI_FADT_LOW_POWER_S0
if S0ix is enabled for the platform. This also sets the
FSPUPD to indicate the status of S0ix on the platform.
TEST= Boot to OS and check the ACPI_FADT_LOW_PWR_IDLE_S0 flag
is set in FACP table - FADT.Flags[21] bit.
Change-Id: I6214ebb61f25ef8b704e60c8474808493c92e6f6
Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/25292
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/acpi.c')
| -rw-r--r-- | src/soc/intel/cannonlake/acpi.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index 9dcaa338c9..0134b86865 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -187,6 +187,9 @@ void soc_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.resv = 0; fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0; + + if(config->s0ix_enable) + fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0; } uint32_t soc_read_sci_irq_select(void) { |