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authorSubrata Banik <subrata.banik@intel.com>2018-05-07 17:13:40 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-06-28 08:35:29 +0000
commit7837c203d615fce03c6d89d99ba9a746619e49d4 (patch)
treeba3626a10a35bd99108228611b18e7f76b7abd02 /src/soc/intel/cannonlake/Makefile.inc
parent210b351df3cc070f103feb01a40be9811af87906 (diff)
soc/intel/common/block: Move p2sb common functions into block/p2sb
This patch cleans soc/intel/{apollolake/cannonlake/skylake} by moving common soc code into common/block/p2sb. BUG=b:78109109 BRANCH=none TEST=Build and boot KBL/CNL/APL platform. Change-Id: Ie9fd933d155b3fcd0d616b41cdf042cefe2c649a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/26132 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/Makefile.inc')
-rw-r--r--src/soc/intel/cannonlake/Makefile.inc3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index 86f147d0c3..f8f91980bb 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -19,6 +19,7 @@ bootblock-y += i2c.c
bootblock-y += memmap.c
bootblock-y += spi.c
bootblock-y += lpc.c
+bootblock-y += p2sb.c
bootblock-$(CONFIG_UART_DEBUG) += uart.c
romstage-$(CONFIG_SOC_INTEL_CANNONLAKE_LPDDR4_INIT) += cnl_lpddr4_init.c
@@ -45,6 +46,7 @@ ramstage-y += lockdown.c
ramstage-y += lpc.c
ramstage-y += memmap.c
ramstage-y += nhlt.c
+ramstage-y += p2sb.c
ramstage-y += pmc.c
ramstage-y += pmutil.c
ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
@@ -56,6 +58,7 @@ ramstage-y += vr_config.c
ramstage-y += sd.c
smm-y += gpio.c
+smm-y += p2sb.c
smm-y += pmutil.c
smm-y += smihandler.c
smm-$(CONFIG_UART_DEBUG) += uart.c