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authorWerner Zeh <werner.zeh@siemens.com>2022-02-11 06:50:57 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-15 17:08:10 +0000
commit6c5efcd26856aef56dd88c231b6e9dc453e80f71 (patch)
tree8c74728ffdc60dfd48cb36e914da7022ab10400b /src/soc/intel/cannonlake/Makefile.inc
parentbd842a9b92c88f73a4097b033b5784f8bbf73cb5 (diff)
soc/intel/elkhartlake: Fix PCR ID for eSPI
According to the Datasheet Volume 1 (doc #636112, [1]) the PCR port ID for eSPI is 0x72 (see chapter 25.2.2). Fix it in the header file. [1]: https://cdrdv2.intel.com/v1/dl/getContent/636112?explicitVersion=true Test=Read and modify PCR registers of eSPI controller. Change-Id: I5b07ef0f3a285f981791b1f4b4cdbda98ccf05ad Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61841 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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