diff options
author | Abhay Kumar <abhay.kumar@intel.com> | 2017-10-12 11:33:01 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-10-19 15:19:36 +0000 |
commit | b0c4cbb7aff5656a35babe7020c71b45fe3235a6 (patch) | |
tree | 43d61a81ae2adbf2f02e47d919b832d9f607fe04 /src/soc/intel/cannonlake/Makefile.inc | |
parent | 0e35eb2434026293db5ab2e466c479b91d634311 (diff) |
soc/intel/cannonlake: Add IGD Support and pre-OS display code
1. Add IGD opregion initialization.
2. Use frame buffer return by FSP for display.
3. Derived from "src/soc/intel/apollolake/graphics.c" with changes
needed for CNL.
TEST=Pre-OS screen comes up and VBT is getting passed to kernel.
Change-Id: I19c0cf6cfc03fc9df9e98c75af4e486cb5a19e32
Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
Reviewed-on: https://review.coreboot.org/21999
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/cannonlake/Makefile.inc')
-rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 1076e10efe..8dfff91544 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -32,6 +32,7 @@ ramstage-y += chip.c ramstage-y += cpu.c ramstage-y += finalize.c ramstage-y += gpio.c +ramstage-y += graphics.c ramstage-y += gspi.c ramstage-y += gpio.c ramstage-y += lpc.c |