diff options
| author | Duncan Laurie <dlaurie@google.com> | 2019-01-07 11:55:16 -0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2019-01-08 19:12:30 +0000 |
| commit | 8601a16c9e6a043f424fab76c7fa12540cf2348b (patch) | |
| tree | 6ffacbb16199cdeedfd0df34cda99f7597c14683 /src/soc/intel/cannonlake/Makefile.inc | |
| parent | 3da1b0d439f249a3e4a056ba24890688adb88d4d (diff) | |
soc/intel/cannonlake: Add chipset event logging
Add logging of chipset events on boot into the flash event log.
This was tested on a google/sarien board to ensure that events
like "System Reset" are added to the log as expected.
Change-Id: I38498cef36d8cc9c8a1f63d12618ea768b65254c
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/30718
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 2452f5066b..faa22f0501 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -34,6 +34,7 @@ romstage-$(CONFIG_UART_DEBUG) += uart.c ramstage-y += acpi.c ramstage-y += chip.c ramstage-y += cpu.c +ramstage-y += elog.c ramstage-y += finalize.c ramstage-y += fsp_params.c ramstage-y += graphics.c |