diff options
author | Lijian Zhao <lijian.zhao@intel.com> | 2017-10-22 18:30:39 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-01-23 05:16:35 +0000 |
commit | 0e956f205219db92c4d3682409ff0b1ee157f5ae (patch) | |
tree | bb125c821a9eac1d1109f3d7e8e480376e861e09 /src/soc/intel/cannonlake/Makefile.inc | |
parent | 1f8470463634b4e09c986150a07b51edfd1999ee (diff) |
soc/intel/cannonlake: Add audio NHLT support
Add audio NHLT support for cannonlake, reference code is implementation
in apollolake.
CQ-DEPEND=CL:*533799
BUG=None
TEST=None
Change-Id: Ie8561cc64412bef54329b317874a8fe12e0bf889
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-on: https://review.coreboot.org/22134
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/Makefile.inc')
-rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index f357a039e0..ca6a5e23f7 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -42,6 +42,7 @@ ramstage-y += gpio.c ramstage-y += i2c.c ramstage-y += lpc.c ramstage-y += memmap.c +ramstage-y += nhlt.c ramstage-y += pmc.c ramstage-y += pmutil.c ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c @@ -73,4 +74,32 @@ CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake CPPFLAGS_common += -I$(src)/soc/intel/cannonlake CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include +# DSP firmware settings files. +NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/cnl/nhlt-blobs +DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin +DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin +DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin +MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin +DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin + +cbfs-files-$(CONFIG_NHLT_DMIC_1CH_16B) += $(DMIC_1CH_48KHZ_16B) +$(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B) +$(DMIC_1CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DMIC_2CH_16B) += $(DMIC_2CH_48KHZ_16B) +$(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B) +$(DMIC_2CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DMIC_4CH_16B) += $(DMIC_4CH_48KHZ_16B) +$(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B) +$(DMIC_4CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER) +$(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER) +$(MAX98357_RENDER)-type := raw + +cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE) +$(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE) +$(DA7219_RENDER_CAPTURE)-type := raw + endif |