diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-12-19 23:14:35 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-23 13:00:30 +0000 |
| commit | e9ac9f97e84ea4ceec3f2468f3ca2b5f2c47fbf2 (patch) | |
| tree | 64d8ebee4fb17259bb61c7f2411a3e03aba85c49 /src/soc/intel/cannonlake/Makefile.inc | |
| parent | af20628a48d8a741a744dc0ecbfbc49524713eaf (diff) | |
soc/intel: Drop SoC specific DPTF implementation
This patch drops the SoC specific implementation as DPTF driver can
now fillin those platform specific data using SoC specific macros.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: If65976f15374ba2410b537b1646ce466ba02969b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71112
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 4bd6a00e0a..5c02252366 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -29,7 +29,6 @@ romstage-y += uart.c ramstage-y += acpi.c ramstage-y += chip.c ramstage-y += cpu.c -ramstage-y += dptf.c ramstage-y += elog.c ramstage-y += finalize.c ramstage-y += fsp_params.c |