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author | Lijian Zhao <lijian.zhao@intel.com> | 2017-08-29 14:37:17 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-10-03 20:23:32 +0000 |
commit | a515849259f71eb92d5465b6bcd9957b73db1889 (patch) | |
tree | b0bed6c3ccc582d0a479ee1324002bf44fe90f36 /src/soc/intel/cannonlake/Makefile.inc | |
parent | 1483d1fcda092283c303fd1d4f4aeca75dcd0bf1 (diff) |
soc/intel/cannonlake: Add lpc pci driver
1.Add common ITSS support as part of LPC driver init code.
2.Add LPC pci driver for CNL
Change-Id: I6c810fd7158e1498664b77eecae22132e2f6878f
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21277
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/Makefile.inc')
-rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index e06c3ef50a..80bc791d43 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -32,6 +32,7 @@ ramstage-y += cpu.c ramstage-y += gpio.c ramstage-y += gspi.c ramstage-y += gpio.c +ramstage-y += lpc.c ramstage-y += memmap.c ramstage-y += pmc.c ramstage-y += pmutil.c |