diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2017-08-08 11:32:35 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-08-09 20:06:27 +0000 |
| commit | aa3d78d5e695f983ace43a594191f31769cd410c (patch) | |
| tree | 73c6042414a4b574fca304eed9cd08a073c62522 /src/soc/intel/cannonlake/Makefile.inc | |
| parent | de0326b96ce3a9ea109e8f62760b6022de256220 (diff) | |
soc/intel/cannonlake: Add ramstage SystemAgent support
Revere memory resource within SA, also perform necessary routine for
initialization during ramstage.
Change-Id: Ibaa7334b0d94fedc87e707a136c9537e2e6f57cb
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/20914
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/cannonlake/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 537a973a61..37434bc4a1 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -19,6 +19,7 @@ romstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c ramstage-y += cbmem.c ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c +ramstage-y += systemagent.c ramstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20 |