aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/cannonlake/Makefile.inc
diff options
context:
space:
mode:
authorLijian Zhao <lijian.zhao@intel.com>2017-08-17 14:25:24 -0700
committerAaron Durbin <adurbin@chromium.org>2017-09-13 03:09:15 +0000
commit2b074d90ae0d20f2d3171f2ddc5d0b6c0d3b78b0 (patch)
tree1d06a3e7633e227a071e60bf6325ae345cc12e6c /src/soc/intel/cannonlake/Makefile.inc
parent6732b4fcdcb48b21631ca73cd1ec37f497d21d3e (diff)
soc/intel/cannonlake: Add common ACPI support for CNL
Basic ACPI support for CNL on top of common ACPI, which will establish a root of FADT table, fill MADT entry, create gnvs field, record wake status and convert device names into DSDT dev definitions. Change-Id: Ibc16d2afdd3cb9bad2ecb85cf320c88504409707 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/21076 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/Makefile.inc')
-rw-r--r--src/soc/intel/cannonlake/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index f75a669266..0490bf927b 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -26,6 +26,7 @@ romstage-y += reset.c
romstage-y += spi.c
romstage-$(CONFIG_UART_DEBUG) += uart.c
+ramstage-y += acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += gpio.c