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authorLijian Zhao <lijian.zhao@intel.com>2017-09-14 14:51:12 -0700
committerAaron Durbin <adurbin@chromium.org>2017-10-03 20:23:41 +0000
commitf0eb99996d0baa7b0c09027f542a17d01c570a47 (patch)
tree747c6997e32e55677bc6c8e9a4007419f6724120 /src/soc/intel/cannonlake/Kconfig
parenta515849259f71eb92d5465b6bcd9957b73db1889 (diff)
soc/intel/cannonlake: Fill the SMI usage
Add SMM support for Cannonlake on top of common SMM, also include the SMM relocate support. Change-Id: I9aab141c528709b30804d327804c4031c59fcfff Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/21543 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/Kconfig')
-rw-r--r--src/soc/intel/cannonlake/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index cb90248b2c..2d9ffa4e9e 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -22,6 +22,7 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_HARD_RESET
select HAVE_INTEL_FIRMWARE
select HAVE_MONOTONIC_TIMER
+ select HAVE_SMI_HANDLER
select INTEL_CAR_NEM_ENHANCED
select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP
select IOAPIC
@@ -31,7 +32,9 @@ config CPU_SPECIFIC_OPTIONS
select POSTCAR_CONSOLE
select POSTCAR_STAGE
select REG_SCRIPT
+ select RELOCATABLE_MODULES
select RELOCATABLE_RAMSTAGE
+ select SMM_TSEG
select SMP
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
@@ -58,6 +61,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_SPI_FLASH_PROTECT
select SOC_INTEL_COMMON_RESET
+ select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS
select TSC_CONSTANT_RATE
select TSC_MONOTONIC_TIMER