diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2017-08-17 14:25:24 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-13 03:09:15 +0000 |
| commit | 2b074d90ae0d20f2d3171f2ddc5d0b6c0d3b78b0 (patch) | |
| tree | 1d06a3e7633e227a071e60bf6325ae345cc12e6c /src/soc/intel/cannonlake/Kconfig | |
| parent | 6732b4fcdcb48b21631ca73cd1ec37f497d21d3e (diff) | |
soc/intel/cannonlake: Add common ACPI support for CNL
Basic ACPI support for CNL on top of common ACPI, which will establish
a root of FADT table, fill MADT entry, create gnvs field, record wake
status and convert device names into DSDT dev definitions.
Change-Id: Ibc16d2afdd3cb9bad2ecb85cf320c88504409707
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21076
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/Kconfig')
| -rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 9525ab488d..fe80a20d67 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -15,6 +15,7 @@ config CPU_SPECIFIC_OPTIONS select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES select C_ENVIRONMENT_BOOTBLOCK + select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select GENERIC_GPIO_LIB select HAVE_HARD_RESET @@ -30,7 +31,9 @@ config CPU_SPECIFIC_OPTIONS select RELOCATABLE_RAMSTAGE select SMP select SOC_INTEL_COMMON + select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK + select SOC_INTEL_COMMON_BLOCK_ACPI select SOC_INTEL_COMMON_BLOCK_CAR select SOC_INTEL_COMMON_BLOCK_CPU select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT |