ACPI: Get S3 resume state from romstage_handoff

There is nothing platform specific in retrieving S3 resume state from
romstage_handoff structure. Boards without EARLY_CBMEM_INIT update
acpi_slp_type from ACPI power-management block or scratchpad registers.

Change-Id: Ifc3755f891a0810473b3216c1fec8e45908fc1ab
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8188
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>

5 files changed, 13 insertions, 60 deletions

diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index 53cc4b8a24..b8eff27de4 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -394,7 +394,7 @@ static void pch_cg_init(device_t dev)
 static void pch_set_acpi_mode(void)
 {
 #if CONFIG_HAVE_SMI_HANDLER
-	if (acpi_slp_type != 3) {
+	if (!acpi_is_wakeup_s3()) {
 		printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
 		outb(APM_CNT_ACPI_DISABLE, APM_CNT);
 		printk(BIOS_DEBUG, "done.\n");
@@ -551,7 +551,7 @@ static void pch_lpc_read_resources(device_t dev)
 
 	/* Allocate ACPI NVS in CBMEM */
 	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(global_nvs_t));
-	if (acpi_slp_type != 3 && gnvs)
+	if (!acpi_is_wakeup_s3() && gnvs)
 		memset(gnvs, 0, sizeof(global_nvs_t));
 }
 
diff --git a/src/soc/intel/broadwell/me.c b/src/soc/intel/broadwell/me.c
index 9ec1d44bcd..2a0ce6636d 100644
--- a/src/soc/intel/broadwell/me.c
+++ b/src/soc/intel/broadwell/me.c
@@ -830,13 +830,11 @@ static void intel_me_init(device_t dev)
 
 static void intel_me_enable(device_t dev)
 {
-#if CONFIG_HAVE_ACPI_RESUME
 	/* Avoid talking to the device in S3 path */
-	if (acpi_slp_type == 3) {
+	if (acpi_is_wakeup_s3()) {
 		dev->enabled = 0;
 		pch_disable_devfn(dev);
 	}
-#endif
 }
 
 static struct device_operations device_ops = {
diff --git a/src/soc/intel/broadwell/ramstage.c b/src/soc/intel/broadwell/ramstage.c
index 0563064531..2097f2f876 100644
--- a/src/soc/intel/broadwell/ramstage.c
+++ b/src/soc/intel/broadwell/ramstage.c
@@ -21,8 +21,8 @@
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
-#include <romstage_handoff.h>
 #include <stdlib.h>
+#include <string.h>
 #include <broadwell/nvs.h>
 #include <broadwell/pm.h>
 #include <broadwell/ramstage.h>
@@ -54,31 +54,18 @@ static void s3_save_acpi_wake_source(global_nvs_t *gnvs)
 	       gnvs->pm1i);
 }
 
-static inline void set_acpi_sleep_type(int val)
-{
-#if CONFIG_HAVE_ACPI_RESUME
-	acpi_slp_type = val;
-#endif
-}
-
 static void s3_resume_prepare(void)
 {
-        global_nvs_t *gnvs;
-        struct romstage_handoff *romstage_handoff;
+	global_nvs_t *gnvs;
 
-        gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(global_nvs_t));
-
-        romstage_handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO);
-        if (romstage_handoff == NULL || romstage_handoff->s3_resume == 0) {
-                if (gnvs != NULL) {
-                        memset(gnvs, 0, sizeof(global_nvs_t));
-                }
-                set_acpi_sleep_type(0);
-                return;
-        }
+	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(global_nvs_t));
+	if (gnvs == NULL)
+		return;
 
-        set_acpi_sleep_type(3);
-        s3_save_acpi_wake_source(gnvs);
+	if (!acpi_is_wakeup_s3())
+		memset(gnvs, 0, sizeof(global_nvs_t));
+	else
+		s3_save_acpi_wake_source(gnvs);
 }
 
 void broadwell_init_pre_device(void *chip_info)
diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c
index a745101535..d66d036310 100644
--- a/src/soc/intel/broadwell/refcode.c
+++ b/src/soc/intel/broadwell/refcode.c
@@ -30,15 +30,6 @@
 #include <broadwell/pei_wrapper.h>
 #include <broadwell/ramstage.h>
 
-static inline int is_s3_resume(void)
-{
-#if CONFIG_HAVE_ACPI_RESUME
-	return acpi_slp_type == 3;
-#else
-	return 0;
-#endif
-}
-
 static inline struct ramstage_cache *next_cache(struct ramstage_cache *c)
 {
 	return (struct ramstage_cache *)&c->program[c->size];
@@ -136,7 +127,7 @@ static pei_wrapper_entry_t load_reference_code(void)
 	};
 	int ret;
 
-	if (is_s3_resume()) {
+	if (acpi_is_wakeup_s3()) {
 		return load_refcode_from_cache();
 	}
 
diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c
index 74c43f26eb..ac021fb9ef 100644
--- a/src/soc/intel/broadwell/systemagent.c
+++ b/src/soc/intel/broadwell/systemagent.c
@@ -29,7 +29,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <cbmem.h>
-#include <romstage_handoff.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <broadwell/cpu.h>
 #include <broadwell/iomap.h>
@@ -412,27 +411,6 @@ static void systemagent_init(struct device *dev)
 	set_power_limits(28);
 }
 
-static void systemagent_enable(device_t dev)
-{
-#if CONFIG_HAVE_ACPI_RESUME
-	struct romstage_handoff *handoff;
-
-	handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO);
-
-	if (handoff == NULL) {
-		printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n");
-		acpi_slp_type = 0;
-	} else if (handoff->s3_resume) {
-		printk(BIOS_DEBUG, "S3 Resume.\n");
-		acpi_slp_type = 3;
-	} else {
-		printk(BIOS_DEBUG, "Normal boot.\n");
-		acpi_slp_type = 0;
-	}
-#endif
-}
-
-
 unsigned long acpi_fill_slit(unsigned long current)
 {
 	// Not implemented
@@ -451,7 +429,6 @@ static struct device_operations systemagent_ops = {
 	.set_resources    = &pci_dev_set_resources,
 	.enable_resources = &pci_dev_enable_resources,
 	.init             = &systemagent_init,
-	.enable           = &systemagent_enable,
 	.ops_pci          = &broadwell_pci_ops,
 };