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authorJulius Werner <jwerner@chromium.org>2014-10-20 13:46:39 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-07 18:23:23 +0200
commit4ee4bd5bb000b5c78e3d4a3f0113fe1e46e44851 (patch)
treeb784e37198840e63eb5dacc5aa5611543d06b5d0 /src/soc/intel/broadwell
parent18ea2d3fbdf89f60a74dc8aabfdb2aa4d3475754 (diff)
broadwell: Change all SoC headers to <soc/headername.h> system
This patch aligns broadwell to the new SoC header include scheme. BUG=None TEST=Tested with whole series. Compiled Auron and Samus. Change-Id: I0cb6aa3d17ce28890e586be1c2c7ad16d91dd925 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 23bcaa8110c4b63999c6ebf370045e9bef87ce6e Original-Change-Id: I613ec0e2b970c75d1f8f7d9bb454bcf11abc78f0 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/224507 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9364 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/intel/broadwell')
-rw-r--r--src/soc/intel/broadwell/Makefile.inc2
-rw-r--r--src/soc/intel/broadwell/acpi.c16
-rw-r--r--src/soc/intel/broadwell/acpi/pch.asl2
-rw-r--r--src/soc/intel/broadwell/acpi/systemagent.asl2
-rw-r--r--src/soc/intel/broadwell/adsp.c16
-rw-r--r--src/soc/intel/broadwell/bootblock/cpu.c4
-rw-r--r--src/soc/intel/broadwell/bootblock/pch.c10
-rw-r--r--src/soc/intel/broadwell/bootblock/systemagent.c4
-rw-r--r--src/soc/intel/broadwell/chip.c6
-rw-r--r--src/soc/intel/broadwell/cpu.c16
-rw-r--r--src/soc/intel/broadwell/cpu_info.c6
-rw-r--r--src/soc/intel/broadwell/ehci.c4
-rw-r--r--src/soc/intel/broadwell/elog.c4
-rw-r--r--src/soc/intel/broadwell/finalize.c12
-rw-r--r--src/soc/intel/broadwell/gpio.c6
-rw-r--r--src/soc/intel/broadwell/hda.c6
-rw-r--r--src/soc/intel/broadwell/igd.c8
-rw-r--r--src/soc/intel/broadwell/include/soc/acpi.h (renamed from src/soc/intel/broadwell/broadwell/acpi.h)2
-rw-r--r--src/soc/intel/broadwell/include/soc/adsp.h (renamed from src/soc/intel/broadwell/broadwell/adsp.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/cpu.h (renamed from src/soc/intel/broadwell/broadwell/cpu.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/device_nvs.h (renamed from src/soc/intel/broadwell/broadwell/device_nvs.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/ehci.h (renamed from src/soc/intel/broadwell/broadwell/ehci.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/gpio.h (renamed from src/soc/intel/broadwell/broadwell/gpio.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/iobp.h (renamed from src/soc/intel/broadwell/broadwell/iobp.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/iomap.h (renamed from src/soc/intel/broadwell/broadwell/iomap.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/lpc.h (renamed from src/soc/intel/broadwell/broadwell/lpc.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/me.h (renamed from src/soc/intel/broadwell/broadwell/me.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/msr.h (renamed from src/soc/intel/broadwell/broadwell/msr.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/nvs.h (renamed from src/soc/intel/broadwell/broadwell/nvs.h)2
-rw-r--r--src/soc/intel/broadwell/include/soc/pch.h (renamed from src/soc/intel/broadwell/broadwell/pch.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/pci_devs.h (renamed from src/soc/intel/broadwell/broadwell/pci_devs.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/pei_data.h (renamed from src/soc/intel/broadwell/broadwell/pei_data.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/pei_wrapper.h (renamed from src/soc/intel/broadwell/broadwell/pei_wrapper.h)2
-rw-r--r--src/soc/intel/broadwell/include/soc/pm.h (renamed from src/soc/intel/broadwell/broadwell/pm.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/ramstage.h (renamed from src/soc/intel/broadwell/broadwell/ramstage.h)2
-rw-r--r--src/soc/intel/broadwell/include/soc/rcba.h (renamed from src/soc/intel/broadwell/broadwell/rcba.h)2
-rw-r--r--src/soc/intel/broadwell/include/soc/reset.h (renamed from src/soc/intel/broadwell/broadwell/reset.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/romstage.h (renamed from src/soc/intel/broadwell/broadwell/romstage.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/sata.h (renamed from src/soc/intel/broadwell/broadwell/sata.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/serialio.h (renamed from src/soc/intel/broadwell/broadwell/serialio.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/smbus.h (renamed from src/soc/intel/broadwell/broadwell/smbus.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/smm.h (renamed from src/soc/intel/broadwell/broadwell/smm.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/spi.h (renamed from src/soc/intel/broadwell/broadwell/spi.h)0
-rw-r--r--src/soc/intel/broadwell/include/soc/systemagent.h (renamed from src/soc/intel/broadwell/broadwell/systemagent.h)2
-rw-r--r--src/soc/intel/broadwell/include/soc/xhci.h (renamed from src/soc/intel/broadwell/broadwell/xhci.h)0
-rw-r--r--src/soc/intel/broadwell/iobp.c4
-rw-r--r--src/soc/intel/broadwell/lpc.c22
-rw-r--r--src/soc/intel/broadwell/me.c14
-rw-r--r--src/soc/intel/broadwell/me_status.c4
-rw-r--r--src/soc/intel/broadwell/memmap.c4
-rw-r--r--src/soc/intel/broadwell/minihd.c2
-rw-r--r--src/soc/intel/broadwell/monotonic_timer.c2
-rw-r--r--src/soc/intel/broadwell/pch.c14
-rw-r--r--src/soc/intel/broadwell/pcie.c16
-rw-r--r--src/soc/intel/broadwell/pei_data.c8
-rw-r--r--src/soc/intel/broadwell/pmutil.c10
-rw-r--r--src/soc/intel/broadwell/ramstage.c8
-rw-r--r--src/soc/intel/broadwell/refcode.c6
-rw-r--r--src/soc/intel/broadwell/reset.c2
-rw-r--r--src/soc/intel/broadwell/romstage/cpu.c6
-rw-r--r--src/soc/intel/broadwell/romstage/pch.c18
-rw-r--r--src/soc/intel/broadwell/romstage/power_state.c10
-rw-r--r--src/soc/intel/broadwell/romstage/raminit.c16
-rw-r--r--src/soc/intel/broadwell/romstage/report_platform.c10
-rw-r--r--src/soc/intel/broadwell/romstage/romstage.c12
-rw-r--r--src/soc/intel/broadwell/romstage/smbus.c8
-rw-r--r--src/soc/intel/broadwell/romstage/spi.c6
-rw-r--r--src/soc/intel/broadwell/romstage/stack.c2
-rw-r--r--src/soc/intel/broadwell/romstage/systemagent.c8
-rw-r--r--src/soc/intel/broadwell/romstage/uart.c4
-rw-r--r--src/soc/intel/broadwell/sata.c10
-rw-r--r--src/soc/intel/broadwell/serialio.c16
-rw-r--r--src/soc/intel/broadwell/smbus.c6
-rw-r--r--src/soc/intel/broadwell/smbus_common.c4
-rw-r--r--src/soc/intel/broadwell/smi.c8
-rw-r--r--src/soc/intel/broadwell/smihandler.c14
-rw-r--r--src/soc/intel/broadwell/smmrelocate.c10
-rw-r--r--src/soc/intel/broadwell/spi.c2
-rw-r--r--src/soc/intel/broadwell/stage_cache.c2
-rw-r--r--src/soc/intel/broadwell/systemagent.c10
-rw-r--r--src/soc/intel/broadwell/tsc_freq.c4
-rw-r--r--src/soc/intel/broadwell/usbdebug.c2
-rw-r--r--src/soc/intel/broadwell/xhci.c6
83 files changed, 223 insertions, 223 deletions
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index b990e1b718..ec6b9ae62a 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -70,7 +70,7 @@ romstage-y += usbdebug.c
smm-y += usbdebug.c
endif
-CPPFLAGS_common += -Isrc/soc/intel/broadwell/
+CPPFLAGS_common += -Isrc/soc/intel/broadwell/include
# Run an intermediate step when producing coreboot.rom
# that adds additional components to the final firmware
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
index 5e7b72b377..f038e87e5a 100644
--- a/src/soc/intel/broadwell/acpi.c
+++ b/src/soc/intel/broadwell/acpi.c
@@ -34,14 +34,14 @@
#include <cpu/intel/turbo.h>
#include <ec/google/chromeec/ec.h>
#include <vendorcode/google/chromeos/gnvs.h>
-#include <broadwell/acpi.h>
-#include <broadwell/cpu.h>
-#include <broadwell/iomap.h>
-#include <broadwell/lpc.h>
-#include <broadwell/msr.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/pm.h>
-#include <chip.h>
+#include <soc/acpi.h>
+#include <soc/cpu.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/msr.h>
+#include <soc/pci_devs.h>
+#include <soc/pm.h>
+#include <soc/intel/broadwell/chip.h>
/*
* List of supported C-states in this processor. Only the ULT parts support C8,
diff --git a/src/soc/intel/broadwell/acpi/pch.asl b/src/soc/intel/broadwell/acpi/pch.asl
index e40c04269a..998133d9d9 100644
--- a/src/soc/intel/broadwell/acpi/pch.asl
+++ b/src/soc/intel/broadwell/acpi/pch.asl
@@ -18,7 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <soc/intel/broadwell/broadwell/iomap.h>
+#include <soc/iomap.h>
Scope (\)
{
diff --git a/src/soc/intel/broadwell/acpi/systemagent.asl b/src/soc/intel/broadwell/acpi/systemagent.asl
index 9c6dacd384..8fcd0b77ed 100644
--- a/src/soc/intel/broadwell/acpi/systemagent.asl
+++ b/src/soc/intel/broadwell/acpi/systemagent.asl
@@ -18,7 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <soc/intel/broadwell/broadwell/iomap.h>
+#include <soc/iomap.h>
Name (_HID, EISAID ("PNP0A08")) // PCIe
Name (_CID, EISAID ("PNP0A03")) // PCI
diff --git a/src/soc/intel/broadwell/adsp.c b/src/soc/intel/broadwell/adsp.c
index bf77763954..1a7cca7975 100644
--- a/src/soc/intel/broadwell/adsp.c
+++ b/src/soc/intel/broadwell/adsp.c
@@ -25,14 +25,14 @@
#include <device/pci_ops.h>
#include <arch/io.h>
#include <delay.h>
-#include <broadwell/adsp.h>
-#include <broadwell/device_nvs.h>
-#include <broadwell/iobp.h>
-#include <broadwell/nvs.h>
-#include <broadwell/pch.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/rcba.h>
-#include <chip.h>
+#include <soc/adsp.h>
+#include <soc/device_nvs.h>
+#include <soc/iobp.h>
+#include <soc/nvs.h>
+#include <soc/pch.h>
+#include <soc/ramstage.h>
+#include <soc/rcba.h>
+#include <soc/intel/broadwell/chip.h>
static void adsp_init(struct device *dev)
{
diff --git a/src/soc/intel/broadwell/bootblock/cpu.c b/src/soc/intel/broadwell/bootblock/cpu.c
index 796f884f8c..3a47d13f0a 100644
--- a/src/soc/intel/broadwell/bootblock/cpu.c
+++ b/src/soc/intel/broadwell/bootblock/cpu.c
@@ -25,8 +25,8 @@
#include <arch/io.h>
#include <halt.h>
#include <cpu/intel/microcode/microcode.c>
-#include <broadwell/rcba.h>
-#include <broadwell/msr.h>
+#include <soc/rcba.h>
+#include <soc/msr.h>
static void set_var_mtrr(
unsigned reg, unsigned base, unsigned size, unsigned type)
diff --git a/src/soc/intel/broadwell/bootblock/pch.c b/src/soc/intel/broadwell/bootblock/pch.c
index 2475a25955..0115719837 100644
--- a/src/soc/intel/broadwell/bootblock/pch.c
+++ b/src/soc/intel/broadwell/bootblock/pch.c
@@ -19,11 +19,11 @@
#include <arch/io.h>
#include <cpu/x86/tsc.h>
-#include <broadwell/iomap.h>
-#include <broadwell/lpc.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/rcba.h>
-#include <broadwell/spi.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/rcba.h>
+#include <soc/spi.h>
static void store_initial_timestamp(void)
{
diff --git a/src/soc/intel/broadwell/bootblock/systemagent.c b/src/soc/intel/broadwell/bootblock/systemagent.c
index b5f82b21b4..15e7fc88b4 100644
--- a/src/soc/intel/broadwell/bootblock/systemagent.c
+++ b/src/soc/intel/broadwell/bootblock/systemagent.c
@@ -18,8 +18,8 @@
*/
#include <arch/io.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/systemagent.h>
+#include <soc/pci_devs.h>
+#include <soc/systemagent.h>
static void bootblock_northbridge_init(void)
{
diff --git a/src/soc/intel/broadwell/chip.c b/src/soc/intel/broadwell/chip.c
index eecb0cf1ea..00261522ce 100644
--- a/src/soc/intel/broadwell/chip.c
+++ b/src/soc/intel/broadwell/chip.c
@@ -20,9 +20,9 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/ramstage.h>
-#include <chip.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
+#include <soc/intel/broadwell/chip.h>
static void pci_domain_set_resources(device_t dev)
{
diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c
index 912f8ae554..b227e0df97 100644
--- a/src/soc/intel/broadwell/cpu.c
+++ b/src/soc/intel/broadwell/cpu.c
@@ -36,14 +36,14 @@
#include <cpu/x86/smm.h>
#include <delay.h>
#include <pc80/mc146818rtc.h>
-#include <broadwell/cpu.h>
-#include <broadwell/msr.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/rcba.h>
-#include <broadwell/smm.h>
-#include <broadwell/systemagent.h>
-#include <chip.h>
+#include <soc/cpu.h>
+#include <soc/msr.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
+#include <soc/rcba.h>
+#include <soc/smm.h>
+#include <soc/systemagent.h>
+#include <soc/intel/broadwell/chip.h>
/* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */
static const u8 power_limit_time_sec_to_msr[] = {
diff --git a/src/soc/intel/broadwell/cpu_info.c b/src/soc/intel/broadwell/cpu_info.c
index a13ca94d42..72667ac18f 100644
--- a/src/soc/intel/broadwell/cpu_info.c
+++ b/src/soc/intel/broadwell/cpu_info.c
@@ -21,9 +21,9 @@
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
-#include <broadwell/cpu.h>
-#include <broadwell/msr.h>
-#include <broadwell/systemagent.h>
+#include <soc/cpu.h>
+#include <soc/msr.h>
+#include <soc/systemagent.h>
u32 cpu_family_model(void)
{
diff --git a/src/soc/intel/broadwell/ehci.c b/src/soc/intel/broadwell/ehci.c
index 2b8a9be1b6..3073a54a2e 100644
--- a/src/soc/intel/broadwell/ehci.c
+++ b/src/soc/intel/broadwell/ehci.c
@@ -24,8 +24,8 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
-#include <broadwell/ehci.h>
-#include <broadwell/pch.h>
+#include <soc/ehci.h>
+#include <soc/pch.h>
static void usb_ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
diff --git a/src/soc/intel/broadwell/elog.c b/src/soc/intel/broadwell/elog.c
index 30f64e00fe..8cbc3e70b6 100644
--- a/src/soc/intel/broadwell/elog.c
+++ b/src/soc/intel/broadwell/elog.c
@@ -22,8 +22,8 @@
#include <console/console.h>
#include <stdint.h>
#include <elog.h>
-#include <broadwell/lpc.h>
-#include <broadwell/pm.h>
+#include <soc/lpc.h>
+#include <soc/pm.h>
static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
{
diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c
index bf77a87a10..b4c2031479 100644
--- a/src/soc/intel/broadwell/finalize.c
+++ b/src/soc/intel/broadwell/finalize.c
@@ -25,12 +25,12 @@
#include <reg_script.h>
#include <spi-generic.h>
#include <stdlib.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/lpc.h>
-#include <broadwell/me.h>
-#include <broadwell/rcba.h>
-#include <broadwell/spi.h>
-#include <broadwell/systemagent.h>
+#include <soc/pci_devs.h>
+#include <soc/lpc.h>
+#include <soc/me.h>
+#include <soc/rcba.h>
+#include <soc/spi.h>
+#include <soc/systemagent.h>
const struct reg_script system_agent_finalize_script[] = {
REG_PCI_OR16(0x50, 1 << 0), /* GGC */
diff --git a/src/soc/intel/broadwell/gpio.c b/src/soc/intel/broadwell/gpio.c
index 92699d28bb..dc7d71371c 100644
--- a/src/soc/intel/broadwell/gpio.c
+++ b/src/soc/intel/broadwell/gpio.c
@@ -22,9 +22,9 @@
#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
-#include <broadwell/gpio.h>
-#include <broadwell/iomap.h>
-#include <broadwell/pm.h>
+#include <soc/gpio.h>
+#include <soc/iomap.h>
+#include <soc/pm.h>
/*
* This function will return a number that indicates which PIRQ
diff --git a/src/soc/intel/broadwell/hda.c b/src/soc/intel/broadwell/hda.c
index ba648dbf8d..b2992e85b2 100644
--- a/src/soc/intel/broadwell/hda.c
+++ b/src/soc/intel/broadwell/hda.c
@@ -27,9 +27,9 @@
#include <arch/io.h>
#include <delay.h>
#include <soc/intel/common/hda_verb.h>
-#include <broadwell/pch.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/rcba.h>
+#include <soc/pch.h>
+#include <soc/ramstage.h>
+#include <soc/rcba.h>
const u32 * cim_verb_data = NULL;
u32 cim_verb_data_size = 0;
diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c
index 53d108def5..714a1394eb 100644
--- a/src/soc/intel/broadwell/igd.c
+++ b/src/soc/intel/broadwell/igd.c
@@ -28,10 +28,10 @@
#include <string.h>
#include <reg_script.h>
#include <drivers/intel/gma/i915_reg.h>
-#include <broadwell/cpu.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/systemagent.h>
-#include <chip.h>
+#include <soc/cpu.h>
+#include <soc/ramstage.h>
+#include <soc/systemagent.h>
+#include <soc/intel/broadwell/chip.h>
#define GT_RETRY 1000
#define GT_CDCLK_337 0
diff --git a/src/soc/intel/broadwell/broadwell/acpi.h b/src/soc/intel/broadwell/include/soc/acpi.h
index 63c0a36c49..2b1e77eea0 100644
--- a/src/soc/intel/broadwell/broadwell/acpi.h
+++ b/src/soc/intel/broadwell/include/soc/acpi.h
@@ -21,7 +21,7 @@
#define _BROADWELL_ACPI_H_
#include <arch/acpi.h>
-#include <broadwell/nvs.h>
+#include <soc/nvs.h>
/* P-state configuration */
#define PSS_MAX_ENTRIES 8
diff --git a/src/soc/intel/broadwell/broadwell/adsp.h b/src/soc/intel/broadwell/include/soc/adsp.h
index 747a123579..747a123579 100644
--- a/src/soc/intel/broadwell/broadwell/adsp.h
+++ b/src/soc/intel/broadwell/include/soc/adsp.h
diff --git a/src/soc/intel/broadwell/broadwell/cpu.h b/src/soc/intel/broadwell/include/soc/cpu.h
index 312532d68a..312532d68a 100644
--- a/src/soc/intel/broadwell/broadwell/cpu.h
+++ b/src/soc/intel/broadwell/include/soc/cpu.h
diff --git a/src/soc/intel/broadwell/broadwell/device_nvs.h b/src/soc/intel/broadwell/include/soc/device_nvs.h
index 7dab40da6a..7dab40da6a 100644
--- a/src/soc/intel/broadwell/broadwell/device_nvs.h
+++ b/src/soc/intel/broadwell/include/soc/device_nvs.h
diff --git a/src/soc/intel/broadwell/broadwell/ehci.h b/src/soc/intel/broadwell/include/soc/ehci.h
index 44d51ef311..44d51ef311 100644
--- a/src/soc/intel/broadwell/broadwell/ehci.h
+++ b/src/soc/intel/broadwell/include/soc/ehci.h
diff --git a/src/soc/intel/broadwell/broadwell/gpio.h b/src/soc/intel/broadwell/include/soc/gpio.h
index a0359755d2..a0359755d2 100644
--- a/src/soc/intel/broadwell/broadwell/gpio.h
+++ b/src/soc/intel/broadwell/include/soc/gpio.h
diff --git a/src/soc/intel/broadwell/broadwell/iobp.h b/src/soc/intel/broadwell/include/soc/iobp.h
index 9f17692508..9f17692508 100644
--- a/src/soc/intel/broadwell/broadwell/iobp.h
+++ b/src/soc/intel/broadwell/include/soc/iobp.h
diff --git a/src/soc/intel/broadwell/broadwell/iomap.h b/src/soc/intel/broadwell/include/soc/iomap.h
index bb98975d85..bb98975d85 100644
--- a/src/soc/intel/broadwell/broadwell/iomap.h
+++ b/src/soc/intel/broadwell/include/soc/iomap.h
diff --git a/src/soc/intel/broadwell/broadwell/lpc.h b/src/soc/intel/broadwell/include/soc/lpc.h
index 180e527c9e..180e527c9e 100644
--- a/src/soc/intel/broadwell/broadwell/lpc.h
+++ b/src/soc/intel/broadwell/include/soc/lpc.h
diff --git a/src/soc/intel/broadwell/broadwell/me.h b/src/soc/intel/broadwell/include/soc/me.h
index a69dfd57c2..a69dfd57c2 100644
--- a/src/soc/intel/broadwell/broadwell/me.h
+++ b/src/soc/intel/broadwell/include/soc/me.h
diff --git a/src/soc/intel/broadwell/broadwell/msr.h b/src/soc/intel/broadwell/include/soc/msr.h
index 707041a161..707041a161 100644
--- a/src/soc/intel/broadwell/broadwell/msr.h
+++ b/src/soc/intel/broadwell/include/soc/msr.h
diff --git a/src/soc/intel/broadwell/broadwell/nvs.h b/src/soc/intel/broadwell/include/soc/nvs.h
index 398e0a266e..41b2e4a8ba 100644
--- a/src/soc/intel/broadwell/broadwell/nvs.h
+++ b/src/soc/intel/broadwell/include/soc/nvs.h
@@ -22,7 +22,7 @@
#define _BROADWELL_NVS_H_
#include <vendorcode/google/chromeos/gnvs.h>
-#include <broadwell/device_nvs.h>
+#include <soc/device_nvs.h>
typedef struct {
/* Miscellaneous */
diff --git a/src/soc/intel/broadwell/broadwell/pch.h b/src/soc/intel/broadwell/include/soc/pch.h
index e677215c7f..e677215c7f 100644
--- a/src/soc/intel/broadwell/broadwell/pch.h
+++ b/src/soc/intel/broadwell/include/soc/pch.h
diff --git a/src/soc/intel/broadwell/broadwell/pci_devs.h b/src/soc/intel/broadwell/include/soc/pci_devs.h
index 76e3a688ed..76e3a688ed 100644
--- a/src/soc/intel/broadwell/broadwell/pci_devs.h
+++ b/src/soc/intel/broadwell/include/soc/pci_devs.h
diff --git a/src/soc/intel/broadwell/broadwell/pei_data.h b/src/soc/intel/broadwell/include/soc/pei_data.h
index e6147181f7..e6147181f7 100644
--- a/src/soc/intel/broadwell/broadwell/pei_data.h
+++ b/src/soc/intel/broadwell/include/soc/pei_data.h
diff --git a/src/soc/intel/broadwell/broadwell/pei_wrapper.h b/src/soc/intel/broadwell/include/soc/pei_wrapper.h
index 9791fa5cdd..3ade4ffff7 100644
--- a/src/soc/intel/broadwell/broadwell/pei_wrapper.h
+++ b/src/soc/intel/broadwell/include/soc/pei_wrapper.h
@@ -20,7 +20,7 @@
#ifndef _BROADWELL_PEI_WRAPPER_H_
#define _BROADWELL_PEI_WRAPPER_H_
-#include <broadwell/pei_data.h>
+#include <soc/pei_data.h>
typedef int ABI_X86 (*pei_wrapper_entry_t)(struct pei_data *pei_data);
diff --git a/src/soc/intel/broadwell/broadwell/pm.h b/src/soc/intel/broadwell/include/soc/pm.h
index 6bc98ef339..6bc98ef339 100644
--- a/src/soc/intel/broadwell/broadwell/pm.h
+++ b/src/soc/intel/broadwell/include/soc/pm.h
diff --git a/src/soc/intel/broadwell/broadwell/ramstage.h b/src/soc/intel/broadwell/include/soc/ramstage.h
index 685de140c3..9242aa9ea3 100644
--- a/src/soc/intel/broadwell/broadwell/ramstage.h
+++ b/src/soc/intel/broadwell/include/soc/ramstage.h
@@ -21,7 +21,7 @@
#define _BROADWELL_RAMSTAGE_H_
#include <device/device.h>
-#include <chip.h>
+#include <soc/intel/broadwell/chip.h>
void broadwell_init_pre_device(void *chip_info);
void broadwell_init_cpus(device_t dev);
diff --git a/src/soc/intel/broadwell/broadwell/rcba.h b/src/soc/intel/broadwell/include/soc/rcba.h
index c550c2daf3..2c40d0720b 100644
--- a/src/soc/intel/broadwell/broadwell/rcba.h
+++ b/src/soc/intel/broadwell/include/soc/rcba.h
@@ -20,7 +20,7 @@
#ifndef _BROADWELL_RCBA_H_
#define _BROADWELL_RCBA_H_
-#include <broadwell/iomap.h>
+#include <soc/iomap.h>
#define RCBA8(x) *((volatile u8 *)(RCBA_BASE_ADDRESS + x))
#define RCBA16(x) *((volatile u16 *)(RCBA_BASE_ADDRESS + x))
diff --git a/src/soc/intel/broadwell/broadwell/reset.h b/src/soc/intel/broadwell/include/soc/reset.h
index 6f21181a0c..6f21181a0c 100644
--- a/src/soc/intel/broadwell/broadwell/reset.h
+++ b/src/soc/intel/broadwell/include/soc/reset.h
diff --git a/src/soc/intel/broadwell/broadwell/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h
index 946d1d0739..946d1d0739 100644
--- a/src/soc/intel/broadwell/broadwell/romstage.h
+++ b/src/soc/intel/broadwell/include/soc/romstage.h
diff --git a/src/soc/intel/broadwell/broadwell/sata.h b/src/soc/intel/broadwell/include/soc/sata.h
index 357fe584af..357fe584af 100644
--- a/src/soc/intel/broadwell/broadwell/sata.h
+++ b/src/soc/intel/broadwell/include/soc/sata.h
diff --git a/src/soc/intel/broadwell/broadwell/serialio.h b/src/soc/intel/broadwell/include/soc/serialio.h
index 2fd6dca973..2fd6dca973 100644
--- a/src/soc/intel/broadwell/broadwell/serialio.h
+++ b/src/soc/intel/broadwell/include/soc/serialio.h
diff --git a/src/soc/intel/broadwell/broadwell/smbus.h b/src/soc/intel/broadwell/include/soc/smbus.h
index fb13c2d8a9..fb13c2d8a9 100644
--- a/src/soc/intel/broadwell/broadwell/smbus.h
+++ b/src/soc/intel/broadwell/include/soc/smbus.h
diff --git a/src/soc/intel/broadwell/broadwell/smm.h b/src/soc/intel/broadwell/include/soc/smm.h
index f7f515cd9b..f7f515cd9b 100644
--- a/src/soc/intel/broadwell/broadwell/smm.h
+++ b/src/soc/intel/broadwell/include/soc/smm.h
diff --git a/src/soc/intel/broadwell/broadwell/spi.h b/src/soc/intel/broadwell/include/soc/spi.h
index 8b95f70a5f..8b95f70a5f 100644
--- a/src/soc/intel/broadwell/broadwell/spi.h
+++ b/src/soc/intel/broadwell/include/soc/spi.h
diff --git a/src/soc/intel/broadwell/broadwell/systemagent.h b/src/soc/intel/broadwell/include/soc/systemagent.h
index 61ea56a30a..5142b09e0a 100644
--- a/src/soc/intel/broadwell/broadwell/systemagent.h
+++ b/src/soc/intel/broadwell/include/soc/systemagent.h
@@ -21,7 +21,7 @@
#ifndef _BROADWELL_SYSTEMAGENT_H_
#define _BROADWELL_SYSTEMAGENT_H_
-#include <broadwell/iomap.h>
+#include <soc/iomap.h>
#define SA_IGD_OPROM_VENDEV 0x80860406
diff --git a/src/soc/intel/broadwell/broadwell/xhci.h b/src/soc/intel/broadwell/include/soc/xhci.h
index 3f4fb4e52d..3f4fb4e52d 100644
--- a/src/soc/intel/broadwell/broadwell/xhci.h
+++ b/src/soc/intel/broadwell/include/soc/xhci.h
diff --git a/src/soc/intel/broadwell/iobp.c b/src/soc/intel/broadwell/iobp.c
index a0b850eafd..870f6af597 100644
--- a/src/soc/intel/broadwell/iobp.c
+++ b/src/soc/intel/broadwell/iobp.c
@@ -20,8 +20,8 @@
#include <console/console.h>
#include <delay.h>
#include <arch/io.h>
-#include <broadwell/iobp.h>
-#include <broadwell/rcba.h>
+#include <soc/iobp.h>
+#include <soc/rcba.h>
#define IOBP_RETRY 1000
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index 5efcb73a28..6ebc758c46 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -34,17 +34,17 @@
#include <cbmem.h>
#include <reg_script.h>
#include <string.h>
-#include <broadwell/gpio.h>
-#include <broadwell/iobp.h>
-#include <broadwell/iomap.h>
-#include <broadwell/lpc.h>
-#include <broadwell/nvs.h>
-#include <broadwell/pch.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/pm.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/rcba.h>
-#include <chip.h>
+#include <soc/gpio.h>
+#include <soc/iobp.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/nvs.h>
+#include <soc/pch.h>
+#include <soc/pci_devs.h>
+#include <soc/pm.h>
+#include <soc/ramstage.h>
+#include <soc/rcba.h>
+#include <soc/intel/broadwell/chip.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <cpu/cpu.h>
diff --git a/src/soc/intel/broadwell/me.c b/src/soc/intel/broadwell/me.c
index 2a0ce6636d..c2bbb49d4a 100644
--- a/src/soc/intel/broadwell/me.c
+++ b/src/soc/intel/broadwell/me.c
@@ -35,13 +35,13 @@
#include <string.h>
#include <delay.h>
#include <elog.h>
-#include <broadwell/me.h>
-#include <broadwell/lpc.h>
-#include <broadwell/pch.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/rcba.h>
-#include <chip.h>
+#include <soc/me.h>
+#include <soc/lpc.h>
+#include <soc/pch.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
+#include <soc/rcba.h>
+#include <soc/intel/broadwell/chip.h>
#if CONFIG_CHROMEOS
#include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/soc/intel/broadwell/me_status.c b/src/soc/intel/broadwell/me_status.c
index 033e4e2112..867a9a95d1 100644
--- a/src/soc/intel/broadwell/me_status.c
+++ b/src/soc/intel/broadwell/me_status.c
@@ -23,8 +23,8 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/me.h>
+#include <soc/pci_devs.h>
+#include <soc/me.h>
#include <delay.h>
static inline void me_read_dword_ptr(void *ptr, int offset)
diff --git a/src/soc/intel/broadwell/memmap.c b/src/soc/intel/broadwell/memmap.c
index 28f4062a6a..7b8df28f71 100644
--- a/src/soc/intel/broadwell/memmap.c
+++ b/src/soc/intel/broadwell/memmap.c
@@ -20,8 +20,8 @@
#include <arch/io.h>
#include <cbmem.h>
#include <device/pci.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/systemagent.h>
+#include <soc/pci_devs.h>
+#include <soc/systemagent.h>
static uintptr_t dpr_region_start(void)
{
diff --git a/src/soc/intel/broadwell/minihd.c b/src/soc/intel/broadwell/minihd.c
index 6fd8e63652..ac5af8d77a 100644
--- a/src/soc/intel/broadwell/minihd.c
+++ b/src/soc/intel/broadwell/minihd.c
@@ -28,7 +28,7 @@
#include <delay.h>
#include <stdlib.h>
#include <soc/intel/common/hda_verb.h>
-#include <broadwell/ramstage.h>
+#include <soc/ramstage.h>
static const u32 minihd_verb_table[] = {
/* coreboot specific header */
diff --git a/src/soc/intel/broadwell/monotonic_timer.c b/src/soc/intel/broadwell/monotonic_timer.c
index ace9e60400..39134ef20a 100644
--- a/src/soc/intel/broadwell/monotonic_timer.c
+++ b/src/soc/intel/broadwell/monotonic_timer.c
@@ -20,7 +20,7 @@
#include <stdint.h>
#include <cpu/x86/msr.h>
#include <timer.h>
-#include <broadwell/msr.h>
+#include <soc/msr.h>
static struct monotonic_counter {
int initialized;
diff --git a/src/soc/intel/broadwell/pch.c b/src/soc/intel/broadwell/pch.c
index 492d177b53..54c5567b40 100644
--- a/src/soc/intel/broadwell/pch.c
+++ b/src/soc/intel/broadwell/pch.c
@@ -24,13 +24,13 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
-#include <broadwell/iobp.h>
-#include <broadwell/pch.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/rcba.h>
-#include <broadwell/serialio.h>
-#include <broadwell/spi.h>
+#include <soc/iobp.h>
+#include <soc/pch.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
+#include <soc/rcba.h>
+#include <soc/serialio.h>
+#include <soc/spi.h>
u8 pch_revision(void)
{
diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c
index 10b623098b..c1aa9103c8 100644
--- a/src/soc/intel/broadwell/pcie.c
+++ b/src/soc/intel/broadwell/pcie.c
@@ -24,14 +24,14 @@
#include <device/pciexp.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <broadwell/gpio.h>
-#include <broadwell/lpc.h>
-#include <broadwell/iobp.h>
-#include <broadwell/pch.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/rcba.h>
-#include <chip.h>
-#include <broadwell/cpu.h>
+#include <soc/gpio.h>
+#include <soc/lpc.h>
+#include <soc/iobp.h>
+#include <soc/pch.h>
+#include <soc/pci_devs.h>
+#include <soc/rcba.h>
+#include <soc/intel/broadwell/chip.h>
+#include <soc/cpu.h>
static void pcie_update_cfg8(device_t dev, int reg, u8 mask, u8 or);
static void pcie_update_cfg(device_t dev, int reg, u32 mask, u32 or);
diff --git a/src/soc/intel/broadwell/pei_data.c b/src/soc/intel/broadwell/pei_data.c
index 9ae7268971..b87202f02d 100644
--- a/src/soc/intel/broadwell/pei_data.c
+++ b/src/soc/intel/broadwell/pei_data.c
@@ -20,10 +20,10 @@
#include <stdlib.h>
#include <stdint.h>
#include <console/streams.h>
-#include <broadwell/iomap.h>
-#include <broadwell/pei_data.h>
-#include <broadwell/pei_wrapper.h>
-#include <broadwell/smm.h>
+#include <soc/iomap.h>
+#include <soc/pei_data.h>
+#include <soc/pei_wrapper.h>
+#include <soc/smm.h>
static void ABI_X86 send_to_console(unsigned char b)
{
diff --git a/src/soc/intel/broadwell/pmutil.c b/src/soc/intel/broadwell/pmutil.c
index 272731cd4f..7686387f97 100644
--- a/src/soc/intel/broadwell/pmutil.c
+++ b/src/soc/intel/broadwell/pmutil.c
@@ -27,11 +27,11 @@
#include <device/pci.h>
#include <device/pci_def.h>
#include <console/console.h>
-#include <broadwell/iomap.h>
-#include <broadwell/lpc.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/pm.h>
-#include <broadwell/gpio.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/pm.h>
+#include <soc/gpio.h>
/* Print status bits with descriptive names */
static void print_status_bits(u32 status, const char *bit_names[])
diff --git a/src/soc/intel/broadwell/ramstage.c b/src/soc/intel/broadwell/ramstage.c
index 2097f2f876..beabded070 100644
--- a/src/soc/intel/broadwell/ramstage.c
+++ b/src/soc/intel/broadwell/ramstage.c
@@ -23,10 +23,10 @@
#include <device/device.h>
#include <stdlib.h>
#include <string.h>
-#include <broadwell/nvs.h>
-#include <broadwell/pm.h>
-#include <broadwell/ramstage.h>
-#include <chip.h>
+#include <soc/nvs.h>
+#include <soc/pm.h>
+#include <soc/ramstage.h>
+#include <soc/intel/broadwell/chip.h>
/* Save bit index for first enabled event in PM1_STS for \_SB._SWS */
static void s3_save_acpi_wake_source(global_nvs_t *gnvs)
diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c
index 36ce97d6af..b7962f1cc6 100644
--- a/src/soc/intel/broadwell/refcode.c
+++ b/src/soc/intel/broadwell/refcode.c
@@ -30,9 +30,9 @@
#if IS_ENABLED(CONFIG_CHROMEOS)
#include <vendorcode/google/chromeos/vboot_handoff.h>
#endif
-#include <broadwell/pei_data.h>
-#include <broadwell/pei_wrapper.h>
-#include <broadwell/ramstage.h>
+#include <soc/pei_data.h>
+#include <soc/pei_wrapper.h>
+#include <soc/ramstage.h>
static inline struct ramstage_cache *next_cache(struct ramstage_cache *c)
{
diff --git a/src/soc/intel/broadwell/reset.c b/src/soc/intel/broadwell/reset.c
index 5117b2917a..a56ec24df0 100644
--- a/src/soc/intel/broadwell/reset.c
+++ b/src/soc/intel/broadwell/reset.c
@@ -21,7 +21,7 @@
#include <arch/io.h>
#include <halt.h>
#include <reset.h>
-#include <broadwell/reset.h>
+#include <soc/reset.h>
/*
* Soft reset (INIT# to cpu) - write 0x1 to I/O 0x92
diff --git a/src/soc/intel/broadwell/romstage/cpu.c b/src/soc/intel/broadwell/romstage/cpu.c
index 754bc31cd6..af175be86f 100644
--- a/src/soc/intel/broadwell/romstage/cpu.c
+++ b/src/soc/intel/broadwell/romstage/cpu.c
@@ -21,9 +21,9 @@
#include <stdlib.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
-#include <broadwell/cpu.h>
-#include <broadwell/msr.h>
-#include <broadwell/romstage.h>
+#include <soc/cpu.h>
+#include <soc/msr.h>
+#include <soc/romstage.h>
u32 cpu_family_model(void)
{
diff --git a/src/soc/intel/broadwell/romstage/pch.c b/src/soc/intel/broadwell/romstage/pch.c
index d064fc0413..f31e6baa76 100644
--- a/src/soc/intel/broadwell/romstage/pch.c
+++ b/src/soc/intel/broadwell/romstage/pch.c
@@ -22,15 +22,15 @@
#include <device/device.h>
#include <device/pci_def.h>
#include <reg_script.h>
-#include <broadwell/iomap.h>
-#include <broadwell/lpc.h>
-#include <broadwell/pch.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/pm.h>
-#include <broadwell/rcba.h>
-#include <broadwell/romstage.h>
-#include <broadwell/smbus.h>
-#include <chip.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pch.h>
+#include <soc/pci_devs.h>
+#include <soc/pm.h>
+#include <soc/rcba.h>
+#include <soc/romstage.h>
+#include <soc/smbus.h>
+#include <soc/intel/broadwell/chip.h>
const struct reg_script pch_early_init_script[] = {
/* Setup southbridge BARs */
diff --git a/src/soc/intel/broadwell/romstage/power_state.c b/src/soc/intel/broadwell/romstage/power_state.c
index 7aa6177810..bdb3da9c3b 100644
--- a/src/soc/intel/broadwell/romstage/power_state.c
+++ b/src/soc/intel/broadwell/romstage/power_state.c
@@ -28,11 +28,11 @@
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
-#include <broadwell/iomap.h>
-#include <broadwell/lpc.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/pm.h>
-#include <broadwell/romstage.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/pm.h>
+#include <soc/romstage.h>
static struct chipset_power_state power_state CAR_GLOBAL;
diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index ce8f87966c..1f62fd0c8c 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -31,14 +31,14 @@
#endif
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/intel/common/mrc_cache.h>
-#include <broadwell/iomap.h>
-#include <broadwell/pei_data.h>
-#include <broadwell/pei_wrapper.h>
-#include <broadwell/pm.h>
-#include <broadwell/reset.h>
-#include <broadwell/romstage.h>
-#include <broadwell/smm.h>
-#include <broadwell/systemagent.h>
+#include <soc/iomap.h>
+#include <soc/pei_data.h>
+#include <soc/pei_wrapper.h>
+#include <soc/pm.h>
+#include <soc/reset.h>
+#include <soc/romstage.h>
+#include <soc/smm.h>
+#include <soc/systemagent.h>
/*
* Find PEI executable in coreboot filesystem and execute it.
diff --git a/src/soc/intel/broadwell/romstage/report_platform.c b/src/soc/intel/broadwell/romstage/report_platform.c
index 84273e4f3a..713b3e7abf 100644
--- a/src/soc/intel/broadwell/romstage/report_platform.c
+++ b/src/soc/intel/broadwell/romstage/report_platform.c
@@ -23,11 +23,11 @@
#include <device/pci.h>
#include <string.h>
#include <cpu/x86/msr.h>
-#include <broadwell/cpu.h>
-#include <broadwell/pch.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/romstage.h>
-#include <broadwell/systemagent.h>
+#include <soc/cpu.h>
+#include <soc/pch.h>
+#include <soc/pci_devs.h>
+#include <soc/romstage.h>
+#include <soc/systemagent.h>
static struct {
u32 cpuid;
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index ff5918a021..31d4f889bd 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -31,12 +31,12 @@
#include <ramstage_cache.h>
#include <romstage_handoff.h>
#include <timestamp.h>
-#include <broadwell/me.h>
-#include <broadwell/pei_data.h>
-#include <broadwell/pm.h>
-#include <broadwell/reset.h>
-#include <broadwell/romstage.h>
-#include <broadwell/spi.h>
+#include <soc/me.h>
+#include <soc/pei_data.h>
+#include <soc/pm.h>
+#include <soc/reset.h>
+#include <soc/romstage.h>
+#include <soc/spi.h>
/* Entry from cache-as-ram.inc. */
void * asmlinkage romstage_main(unsigned long bist,
diff --git a/src/soc/intel/broadwell/romstage/smbus.c b/src/soc/intel/broadwell/romstage/smbus.c
index 8b3cde3fb5..f09459bedd 100644
--- a/src/soc/intel/broadwell/romstage/smbus.c
+++ b/src/soc/intel/broadwell/romstage/smbus.c
@@ -23,10 +23,10 @@
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <reg_script.h>
-#include <broadwell/iomap.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/smbus.h>
-#include <broadwell/romstage.h>
+#include <soc/iomap.h>
+#include <soc/pci_devs.h>
+#include <soc/smbus.h>
+#include <soc/romstage.h>
static const struct reg_script smbus_init_script[] = {
/* Set SMBUS I/O base address */
diff --git a/src/soc/intel/broadwell/romstage/spi.c b/src/soc/intel/broadwell/romstage/spi.c
index 75df2fd1ca..a2c5d33a75 100644
--- a/src/soc/intel/broadwell/romstage/spi.c
+++ b/src/soc/intel/broadwell/romstage/spi.c
@@ -22,9 +22,9 @@
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <delay.h>
-#include <broadwell/spi.h>
-#include <broadwell/rcba.h>
-#include <broadwell/romstage.h>
+#include <soc/spi.h>
+#include <soc/rcba.h>
+#include <soc/romstage.h>
#define SPI_DELAY 10 /* 10us */
#define SPI_RETRY 200000 /* 2s */
diff --git a/src/soc/intel/broadwell/romstage/stack.c b/src/soc/intel/broadwell/romstage/stack.c
index 7f566295e0..a81eb07639 100644
--- a/src/soc/intel/broadwell/romstage/stack.c
+++ b/src/soc/intel/broadwell/romstage/stack.c
@@ -24,7 +24,7 @@
#include <console/console.h>
#include <cbmem.h>
#include <cpu/x86/mtrr.h>
-#include <broadwell/romstage.h>
+#include <soc/romstage.h>
static inline uint32_t *stack_push(u32 *stack, u32 value)
{
diff --git a/src/soc/intel/broadwell/romstage/systemagent.c b/src/soc/intel/broadwell/romstage/systemagent.c
index 8e4d82c74a..7a43917601 100644
--- a/src/soc/intel/broadwell/romstage/systemagent.c
+++ b/src/soc/intel/broadwell/romstage/systemagent.c
@@ -22,10 +22,10 @@
#include <arch/io.h>
#include <device/pci_def.h>
#include <reg_script.h>
-#include <broadwell/iomap.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/romstage.h>
-#include <broadwell/systemagent.h>
+#include <soc/iomap.h>
+#include <soc/pci_devs.h>
+#include <soc/romstage.h>
+#include <soc/systemagent.h>
static const struct reg_script systemagent_early_init_script[] = {
REG_PCI_WRITE32(MCHBAR, MCH_BASE_ADDRESS | 1),
diff --git a/src/soc/intel/broadwell/romstage/uart.c b/src/soc/intel/broadwell/romstage/uart.c
index 8214a8a116..96c96343f1 100644
--- a/src/soc/intel/broadwell/romstage/uart.c
+++ b/src/soc/intel/broadwell/romstage/uart.c
@@ -24,8 +24,8 @@
#include <reg_script.h>
#include <stdint.h>
#include <uart8250.h>
-#include <broadwell/iobp.h>
-#include <broadwell/serialio.h>
+#include <soc/iobp.h>
+#include <soc/serialio.h>
const struct reg_script uart_init[] = {
/* Set MMIO BAR */
diff --git a/src/soc/intel/broadwell/sata.c b/src/soc/intel/broadwell/sata.c
index 6859ffce37..cfb3854831 100644
--- a/src/soc/intel/broadwell/sata.c
+++ b/src/soc/intel/broadwell/sata.c
@@ -24,11 +24,11 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <delay.h>
-#include <broadwell/iobp.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/rcba.h>
-#include <broadwell/sata.h>
-#include <chip.h>
+#include <soc/iobp.h>
+#include <soc/ramstage.h>
+#include <soc/rcba.h>
+#include <soc/sata.h>
+#include <soc/intel/broadwell/chip.h>
static inline u32 sir_read(struct device *dev, int idx)
{
diff --git a/src/soc/intel/broadwell/serialio.c b/src/soc/intel/broadwell/serialio.c
index 82f37cdb94..6eba7ac020 100644
--- a/src/soc/intel/broadwell/serialio.c
+++ b/src/soc/intel/broadwell/serialio.c
@@ -25,14 +25,14 @@
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <stdlib.h>
-#include <broadwell/iobp.h>
-#include <broadwell/nvs.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/pch.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/rcba.h>
-#include <broadwell/serialio.h>
-#include <chip.h>
+#include <soc/iobp.h>
+#include <soc/nvs.h>
+#include <soc/pci_devs.h>
+#include <soc/pch.h>
+#include <soc/ramstage.h>
+#include <soc/rcba.h>
+#include <soc/serialio.h>
+#include <soc/intel/broadwell/chip.h>
/* Set D3Hot Power State in ACPI mode */
static void serialio_enable_d3hot(struct resource *res)
diff --git a/src/soc/intel/broadwell/smbus.c b/src/soc/intel/broadwell/smbus.c
index a1dbdfecc8..0ec84b27db 100644
--- a/src/soc/intel/broadwell/smbus.c
+++ b/src/soc/intel/broadwell/smbus.c
@@ -27,9 +27,9 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <broadwell/iomap.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/smbus.h>
+#include <soc/iomap.h>
+#include <soc/ramstage.h>
+#include <soc/smbus.h>
static void pch_smbus_init(device_t dev)
{
diff --git a/src/soc/intel/broadwell/smbus_common.c b/src/soc/intel/broadwell/smbus_common.c
index ff43dcd35f..41416c712c 100644
--- a/src/soc/intel/broadwell/smbus_common.c
+++ b/src/soc/intel/broadwell/smbus_common.c
@@ -26,8 +26,8 @@
#include <device/smbus_def.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/smbus.h>
+#include <soc/ramstage.h>
+#include <soc/smbus.h>
static void smbus_delay(void)
{
diff --git a/src/soc/intel/broadwell/smi.c b/src/soc/intel/broadwell/smi.c
index 529346a23b..85a508b629 100644
--- a/src/soc/intel/broadwell/smi.c
+++ b/src/soc/intel/broadwell/smi.c
@@ -26,10 +26,10 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
-#include <broadwell/iomap.h>
-#include <broadwell/pch.h>
-#include <broadwell/pm.h>
-#include <broadwell/smm.h>
+#include <soc/iomap.h>
+#include <soc/pch.h>
+#include <soc/pm.h>
+#include <soc/smm.h>
void southbridge_smm_clear_state(void)
{
diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c
index e1f7e5bfa7..5004a6a214 100644
--- a/src/soc/intel/broadwell/smihandler.c
+++ b/src/soc/intel/broadwell/smihandler.c
@@ -29,13 +29,13 @@
#include <elog.h>
#include <halt.h>
#include <pc80/mc146818rtc.h>
-#include <broadwell/lpc.h>
-#include <broadwell/nvs.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/pm.h>
-#include <broadwell/rcba.h>
-#include <broadwell/smm.h>
-#include <broadwell/xhci.h>
+#include <soc/lpc.h>
+#include <soc/nvs.h>
+#include <soc/pci_devs.h>
+#include <soc/pm.h>
+#include <soc/rcba.h>
+#include <soc/smm.h>
+#include <soc/xhci.h>
static u8 smm_initialized = 0;
diff --git a/src/soc/intel/broadwell/smmrelocate.c b/src/soc/intel/broadwell/smmrelocate.c
index bd1fc2695d..47d6385a63 100644
--- a/src/soc/intel/broadwell/smmrelocate.c
+++ b/src/soc/intel/broadwell/smmrelocate.c
@@ -29,11 +29,11 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
#include <console/console.h>
-#include <broadwell/cpu.h>
-#include <broadwell/msr.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/smm.h>
-#include <broadwell/systemagent.h>
+#include <soc/cpu.h>
+#include <soc/msr.h>
+#include <soc/pci_devs.h>
+#include <soc/smm.h>
+#include <soc/systemagent.h>
/* This gets filled in and used during relocation. */
static struct smm_relocation_params smm_reloc_params;
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c
index 0069d10ea2..6d2f103d8a 100644
--- a/src/soc/intel/broadwell/spi.c
+++ b/src/soc/intel/broadwell/spi.c
@@ -28,7 +28,7 @@
#include <console/console.h>
#include <device/pci_ids.h>
#include <spi-generic.h>
-#include <broadwell/pci_devs.h>
+#include <soc/pci_devs.h>
#ifdef __SMM__
#define pci_read_config_byte(dev, reg, targ)\
diff --git a/src/soc/intel/broadwell/stage_cache.c b/src/soc/intel/broadwell/stage_cache.c
index 6c6b6fb6bf..cb34297cdd 100644
--- a/src/soc/intel/broadwell/stage_cache.c
+++ b/src/soc/intel/broadwell/stage_cache.c
@@ -19,7 +19,7 @@
#include <cbmem.h>
#include <ramstage_cache.h>
-#include <broadwell/smm.h>
+#include <soc/smm.h>
#include <stdint.h>
struct ramstage_cache *ramstage_cache_location(long *size)
diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c
index 0488ccbe4c..d58cf219b7 100644
--- a/src/soc/intel/broadwell/systemagent.c
+++ b/src/soc/intel/broadwell/systemagent.c
@@ -30,11 +30,11 @@
#include <string.h>
#include <cbmem.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#include <broadwell/cpu.h>
-#include <broadwell/iomap.h>
-#include <broadwell/pci_devs.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/systemagent.h>
+#include <soc/cpu.h>
+#include <soc/iomap.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
+#include <soc/systemagent.h>
u8 systemagent_revision(void)
{
diff --git a/src/soc/intel/broadwell/tsc_freq.c b/src/soc/intel/broadwell/tsc_freq.c
index 80dd989d2e..5487b16b8c 100644
--- a/src/soc/intel/broadwell/tsc_freq.c
+++ b/src/soc/intel/broadwell/tsc_freq.c
@@ -20,8 +20,8 @@
#include <stdint.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/tsc.h>
-#include <broadwell/cpu.h>
-#include <broadwell/msr.h>
+#include <soc/cpu.h>
+#include <soc/msr.h>
unsigned long tsc_freq_mhz(void)
{
diff --git a/src/soc/intel/broadwell/usbdebug.c b/src/soc/intel/broadwell/usbdebug.c
index d462e89f90..736a1a3c44 100644
--- a/src/soc/intel/broadwell/usbdebug.c
+++ b/src/soc/intel/broadwell/usbdebug.c
@@ -23,7 +23,7 @@
#include <usbdebug.h>
#include <device/pci.h>
#include <device/pci_def.h>
-#include <broadwell/pci_devs.h>
+#include <soc/pci_devs.h>
void set_debug_port(unsigned int port)
{
diff --git a/src/soc/intel/broadwell/xhci.c b/src/soc/intel/broadwell/xhci.c
index b330338169..4c721c28a3 100644
--- a/src/soc/intel/broadwell/xhci.c
+++ b/src/soc/intel/broadwell/xhci.c
@@ -23,9 +23,9 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/xhci.h>
-#include <broadwell/cpu.h>
+#include <soc/ramstage.h>
+#include <soc/xhci.h>
+#include <soc/cpu.h>
#ifdef __SMM__
static u8 *usb_xhci_mem_base(device_t dev)