diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-23 12:40:07 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-10 07:27:57 +0000 |
| commit | f21e5c06cd7d731857ffb2483ce6f39ef0afa1b1 (patch) | |
| tree | b092d62bf96277ec96839856ea86a9ad343f29ea /src/soc/intel/broadwell | |
| parent | e0f058ffa8309bd902802074418b5c6e0075a8aa (diff) | |
soc/intel/broadwell/pch: Drop `acpi_sci_irq` function
The SCI IRQ is always set to IRQ 9 in the bootblock. To allow using
common MADT code on Broadwell, hardcode it as 9 everywhere.
Change-Id: I84345b7985b1996369cecc4bcb0a3668d002a922
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46888
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/broadwell')
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/pm.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/fadt.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/pmutil.c | 28 |
4 files changed, 2 insertions, 33 deletions
diff --git a/src/soc/intel/broadwell/include/soc/pm.h b/src/soc/intel/broadwell/include/soc/pm.h index 352394cb21..40467ed1dd 100644 --- a/src/soc/intel/broadwell/include/soc/pm.h +++ b/src/soc/intel/broadwell/include/soc/pm.h @@ -139,9 +139,6 @@ void disable_all_gpe(void); void enable_gpe(uint32_t mask); void disable_gpe(uint32_t mask); -/* Return the selected ACPI SCI IRQ */ -int acpi_sci_irq(void); - /* STM Support */ uint16_t get_pmbase(void); diff --git a/src/soc/intel/broadwell/pch/acpi.c b/src/soc/intel/broadwell/pch/acpi.c index 48a83df7b2..d3e7fcfcd2 100644 --- a/src/soc/intel/broadwell/pch/acpi.c +++ b/src/soc/intel/broadwell/pch/acpi.c @@ -21,7 +21,7 @@ unsigned long acpi_fill_madt(unsigned long current) { - int sci = acpi_sci_irq(); + int sci = 9; acpi_madt_irqoverride_t *irqovr; uint16_t flags = MP_IRQ_TRIGGER_LEVEL; diff --git a/src/soc/intel/broadwell/pch/fadt.c b/src/soc/intel/broadwell/pch/fadt.c index 8fbd0c45ad..6ba6478795 100644 --- a/src/soc/intel/broadwell/pch/fadt.c +++ b/src/soc/intel/broadwell/pch/fadt.c @@ -10,7 +10,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) { const uint16_t pmbase = ACPI_BASE_ADDRESS; - fadt->sci_int = acpi_sci_irq(); + fadt->sci_int = 9; if (permanent_smi_handler()) { fadt->smi_cmd = APM_CNT; diff --git a/src/soc/intel/broadwell/pch/pmutil.c b/src/soc/intel/broadwell/pch/pmutil.c index e63a981456..be383277e5 100644 --- a/src/soc/intel/broadwell/pch/pmutil.c +++ b/src/soc/intel/broadwell/pch/pmutil.c @@ -412,34 +412,6 @@ void disable_gpe(u32 mask) outl(gpe0_en, get_pmbase() + GPE0_EN(GPE_STD)); } -int acpi_sci_irq(void) -{ - int scis = pci_read_config32(PCH_DEV_LPC, ACPI_CNTL) & SCI_IRQ_SEL; - int sci_irq = 9; - - /* Determine how SCI is routed. */ - switch (scis) { - case SCIS_IRQ9: - case SCIS_IRQ10: - case SCIS_IRQ11: - sci_irq = scis - SCIS_IRQ9 + 9; - break; - case SCIS_IRQ20: - case SCIS_IRQ21: - case SCIS_IRQ22: - case SCIS_IRQ23: - sci_irq = scis - SCIS_IRQ20 + 20; - break; - default: - printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n"); - sci_irq = 9; - break; - } - - printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq); - return sci_irq; -} - int platform_is_resuming(void) { if (!(inw(get_pmbase() + PM1_STS) & WAK_STS)) |